Overview
The TMS320C6657CZH25 is a high-performance dual-core digital signal processor (DSP) from Texas Instruments, based on the KeyStone multicore architecture. This device features two TMS320C66x™ DSP core subsystems, each capable of operating at frequencies up to 1.25 GHz. The C6657 is designed for power efficiency and ease of use, making it suitable for a broad range of applications. It is fully backward compatible with the existing C6000 family of fixed- and floating-point DSPs, ensuring software portability and shortened development cycles.
Key Specifications
| Specification | Details |
|---|---|
| Number of Cores | Two TMS320C66x™ DSP Core Subsystems |
| Core Frequency | Up to 1.25 GHz |
| Fixed-Point Performance | 40 GMAC per Core @ 1.25 GHz |
| Floating-Point Performance | 20 GFLOP per Core @ 1.25 GHz |
| Memory | 1024KB Multicore Shared Memory (MSM SRAM), 32KB L1 Program and Data Cache, 1024KB L2 Unified Memory/Cache |
| External Memory Interface | 32-bit DDR3 interface, DDR3-1333 MHz, ECC DRAM support |
| Peripherals | Four lanes of SRIO 2.1, PCIe Gen2, Gigabit Ethernet, UART, McBSP, SPI, I2C, 32 GPIO Pins |
| Package | 625-Pin Flip-Chip Plastic BGA (CZH) |
| Operating Temperature Range | 0°C to 85°C (Commercial), –40°C to 100°C (Extended) |
Key Features
- High-performance dual-core C66x fixed- and floating-point CPU cores
- Multicore Shared Memory Controller (MSMC) with 1024KB MSM SRAM
- Multicore Navigator with 8192 multipurpose hardware queues
- Packet-based DMA for zero-overhead transfers
- Hardware accelerators including two Viterbi coprocessors and one Turbo coprocessor decoder
- High-speed interfaces: SRIO 2.1, PCIe Gen2, Gigabit Ethernet, HyperLink
- Support for direct I/O, message passing, and various link configurations
- 32-bit DDR3 external memory interface with ECC DRAM support
- Universal Parallel Port, UART, McBSP, SPI, I2C, and GPIO
- Up to eight 64-bit timers and two on-chip PLLs
Applications
The TMS320C6657CZH25 is versatile and can be used in a variety of applications, including:
- Telecommunications infrastructure
- Medical imaging and diagnostics
- Aerospace and defense systems
- Industrial automation and control
- High-performance computing and data analytics
- Wireless and wired communication systems
Q & A
- What is the maximum core frequency of the TMS320C6657CZH25?
The maximum core frequency is up to 1.25 GHz.
- How many cores does the TMS320C6657CZH25 have?
The device features two TMS320C66x™ DSP core subsystems.
- What type of memory does the TMS320C6657CZH25 have?
The device includes 1024KB Multicore Shared Memory (MSM SRAM), 32KB L1 Program and Data Cache, and 1024KB L2 Unified Memory/Cache.
- What external memory interface does the TMS320C6657CZH25 support?
The device supports a 32-bit DDR3 interface with a maximum data rate of 1333 MHz and ECC DRAM support.
- What high-speed interfaces are supported by the TMS320C6657CZH25?
The device supports SRIO 2.1, PCIe Gen2, Gigabit Ethernet, and HyperLink interfaces.
- Is the TMS320C6657CZH25 backward compatible with previous DSPs?
Yes, it is fully backward compatible with the existing C6000 family of fixed- and floating-point DSPs.
- What is the operating temperature range of the TMS320C6657CZH25?
The operating temperature range is 0°C to 85°C (Commercial) and –40°C to 100°C (Extended).
- What type of package does the TMS320C6657CZH25 come in?
The device comes in a 625-Pin Flip-Chip Plastic BGA (CZH) package.
- What are some of the hardware accelerators available on the TMS320C6657CZH25?
The device includes two Viterbi coprocessors and one Turbo coprocessor decoder.
- Does the TMS320C6657CZH25 support packet-based DMA?
Yes, it supports packet-based DMA for zero-overhead transfers.
