SN65LVDS84AQDGGRQ1
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Texas Instruments SN65LVDS84AQDGGRQ1

Manufacturer No:
SN65LVDS84AQDGGRQ1
Manufacturer:
Texas Instruments
Package:
Tape & Reel (TR)
Description:
IC DRIVER 4/0 48TSSOP
Delivery:
Payment:
iso14001
iso45001
iso9001
iso13485

Product Introduction

Overview

The SN65LVDS84AQ-Q1 is a FlatLink™ transmitter produced by Texas Instruments. This integrated circuit contains three 7-bit parallel-load serial-out shift registers and four low-voltage differential signaling (LVDS) line drivers. It is designed to transmit 21 bits of single-ended LVTTL data synchronously over three balanced-pair conductors, making it suitable for applications such as SVGA, XGA, or SXGA data transmission from a controller to a display with very low electromagnetic interference (EMI). The device operates from a single 3.3-V supply, consumes 89 mW typically, and is packaged in a Thin Shrink Small-Outline Package (TSSOP) with a 20-mil terminal pitch. It requires no external components for its phase-locked loop (PLL) and is qualified for automotive applications, operating over a temperature range of –40°C to 125°C.

Key Specifications

Parameter Min Nom Max Unit
Supply Voltage (VCC) 3 3.3 3.6 V
Operating Temperature Range (TA) –40 125 °C
Input Clock Period (tc) 13.3 32.4 ns
Differential Load Impedance (ZL) 90 132 Ω
Differential Steady-State Output Voltage (|VOD|) 247 454 mV
Peak-to-Peak Common-Mode Output Voltage (VOC(PP)) 80 150 mV
Quiescent Supply Current (ICC(AVG)) at 65 MHz 27 35 mA
Quiescent Supply Current (ICC(AVG)) at 75 MHz 30 38 mA
Input Capacitance (CI) 2 pF
Package Type TSSOP (DGG)
Pins 48

Key Features

  • 21:3 Data Channel Compression at up to 196 Mbytes/s Throughput
  • Suited for SVGA, XGA, or SXGA data transmission from controller to display with very low EMI
  • 21 data channels plus clock in low-voltage TTL inputs and 3 data channels plus clock out low-voltage differential signaling (LVDS) outputs
  • Operates from a single 3.3-V supply and consumes 89 mW typically
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) with 20-mil terminal pitch
  • Consumes less than 0.54 mW when disabled
  • Wide phase-lock input frequency range: 31 MHz to 75 MHz
  • No external components required for PLL
  • Outputs meet or exceed the requirements of ANSI EIA/TIA-644 Standard
  • SSC tracking capability of 3% center spread at 50-kHz modulation frequency
  • Improved replacement for SN75LVDS84 and NSC DS90CF363A 3-V device
  • Qualified for automotive applications

Applications

  • SVGA, XGA, or SXGA data transmission from a controller to a display
  • Automotive applications due to its operating temperature range of –40°C to 125°C
  • Any system requiring high-speed data transmission with low EMI, such as in industrial, medical, or consumer electronics

Q & A

  1. What is the primary function of the SN65LVDS84AQ-Q1?

    The SN65LVDS84AQ-Q1 is a FlatLink™ transmitter that converts 21 bits of single-ended LVTTL data into three serial streams and a phase-locked clock, transmitted over LVDS outputs.

  2. What is the operating voltage range of the SN65LVDS84AQ-Q1?

    The device operates from a single 3.3-V supply, with a voltage range of 3 to 3.6 V.

  3. What is the operating temperature range of the SN65LVDS84AQ-Q1?

    The device operates over a temperature range of –40°C to 125°C.

  4. What type of package does the SN65LVDS84AQ-Q1 come in?

    The device is packaged in a Thin Shrink Small-Outline Package (TSSOP) with 48 pins and a 20-mil terminal pitch.

  5. Does the SN65LVDS84AQ-Q1 require any external components for its PLL?

    No, the SN65LVDS84AQ-Q1 does not require any external components for its phase-locked loop (PLL).

  6. What are the key applications of the SN65LVDS84AQ-Q1?

    The device is suited for SVGA, XGA, or SXGA data transmission and is qualified for automotive applications.

  7. How much power does the SN65LVDS84AQ-Q1 consume when enabled and disabled?

    When enabled, it consumes around 89 mW typically, and less than 0.54 mW when disabled.

  8. What is the input clock frequency range for the SN65LVDS84AQ-Q1?

    The device has a wide phase-lock input frequency range of 31 MHz to 75 MHz.

  9. Does the SN65LVDS84AQ-Q1 meet any specific standards for LVDS outputs?

    Yes, the outputs meet or exceed the requirements of the ANSI EIA/TIA-644 Standard.

  10. How does the SN65LVDS84AQ-Q1 handle SSC tracking?

    The device has an SSC tracking capability of 3% center spread at a 50-kHz modulation frequency.

Product Attributes

Type:Driver
Protocol:LVDS
Number of Drivers/Receivers:4/0
Duplex:- 
Receiver Hysteresis:- 
Data Rate:- 
Voltage - Supply:3V ~ 3.6V
Operating Temperature:-40°C ~ 125°C
Mounting Type:Surface Mount
Package / Case:48-TFSOP (0.240", 6.10mm Width)
Supplier Device Package:48-TSSOP
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