Overview
The SCANSTA112VS, produced by Texas Instruments, is a 7-port multidrop IEEE 1149.1 (JTAG) multiplexer designed to extend the IEEE Std. 1149.1 test bus into a multidrop test bus environment. This component enhances test throughput and allows for the removal of a board from the system while retaining test access to the remaining modules. It supports up to 7 local IEEE 1149.1 scan chains, which can be accessed individually or combined serially, making it highly versatile for complex testing scenarios.
Key Specifications
| Specification | Value |
|---|---|
| Package | 100-TQFP (NEZ) |
| Pins | 100 |
| Operating Temperature Range (°C) | -40 to 85 |
| Supply Voltage (VCC) | 3.0-3.6V |
| Address Inputs | 8 (supporting up to 249 unique slot addresses) |
| Local Scan Ports | 7 IEEE 1149.1-compatible configurable ports |
| TCK Counter | 32-bit |
| LFSR Signature Compactor | 16-bit |
Key Features
- True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
- Bi-directional Backplane and LSP0 Ports are Interchangeable Slave Ports
- Stitcher Mode Bypasses Level 1 and 2 Protocols
- Mode Register Allows Local TAPs to be Bypassed, Selected for Insertion into the Scan Chain Individually, or Serially in Groups of Two or Three
- Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to Those on a Single Local Scan Port
- General Purpose Local Port Pass Through Bits for Flash Programming or Monitoring Device Status
- Known Power-Up State and TRST on all Local Scan Ports
- Local TAPs can Become TRI-STATE via the OE Input
- Supports Live Insertion/Withdrawal
Applications
The SCANSTA112VS is particularly useful in complex electronic systems that require extensive testing and debugging. It is ideal for applications such as:
- Backplane and inter-board testing in large-scale systems
- Built-in self-test operations for multiple ports simultaneously
- Systems requiring live insertion and withdrawal of boards without disrupting test access
- Environments where hierarchical and multidrop addressable testing is necessary
Q & A
- What is the primary function of the SCANSTA112VS?
The primary function of the SCANSTA112VS is to extend the IEEE Std. 1149.1 test bus into a multidrop test bus environment, enhancing test throughput and flexibility. - What type of package does the SCANSTA112VS come in?
The SCANSTA112VS comes in a 100-TQFP (NEZ) package. - What is the operating temperature range of the SCANSTA112VS?
The operating temperature range is -40 to 85°C. - How many local scan ports does the SCANSTA112VS support?
The SCANSTA112VS supports up to 7 IEEE 1149.1-compatible configurable local scan ports. - What is the purpose of the 32-bit TCK counter?
The 32-bit TCK counter enables built-in self-test operations to be performed on one port while other scan chains are simultaneously tested. - Can the backplane and LSP0 ports be configured as master or slave?
Yes, the backplane and LSP0 ports are bidirectional and can be configured to alternatively act as the master or slave port. - What is the supply voltage range for the SCANSTA112VS?
The supply voltage range is 3.0-3.6V. - Does the SCANSTA112VS support live insertion and withdrawal?
Yes, it supports live insertion and withdrawal of boards without disrupting test access. - How many unique slot addresses can the 8 address inputs support?
The 8 address inputs support up to 249 unique slot addresses, an interrogation address, broadcast address, and 4 multi-cast group addresses. - What is the purpose of the transparent mode in the SCANSTA112VS?
The transparent mode can be enabled with a single instruction to conveniently buffer the backplane IEEE 1149.1 pins to those on a single local scan port.
