Overview
The OMAP-L132, produced by Texas Instruments, is a low-power, dual-core system-on-chip (SoC) that integrates an ARM926EJ-S RISC microprocessor unit (MPU) and a TMS320C674x fixed- and floating-point digital signal processor (DSP). This processor is designed to provide high performance with significantly lower power consumption compared to other members of the TMS320C6000™ platform of DSPs. The dual-core architecture combines the benefits of both DSP and reduced instruction set computer (RISC) technologies, enabling original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly develop devices with robust operating systems, rich user interfaces, and high processor performance.
Key Specifications
| Specification | Details |
|---|---|
| Processor Cores | Dual-Core: 200-MHz ARM926EJ-S RISC MPU and 200-MHz C674x DSP |
| ARM926EJ-S Core | 32-bit RISC processor, 32- and 16-bit instructions, 16KB instruction cache, 16KB data cache, 8KB RAM (Vector Table), 64KB ROM |
| C674x DSP Core | Fixed- and floating-point VLIW DSP, up to 1600 MIPS and 1200 MFLOPS, 32KB L1P program RAM/cache, 32KB L1D data RAM/cache, 256KB L2 unified mapped RAM/cache |
| Memory Interfaces | DDR2/mDDR memory controller, EMIFA for asynchronous and SDRAM, NOR, NAND flash |
| Peripherals | USB 2.0 OTG, two I2C Bus interfaces, McASP, two McBSPs, 10/100 Mbps Ethernet MAC, RTC, three 64-bit general-purpose timers, two eHRPWMs, three eCAP modules |
| Package | 361-ball Pb-Free PBGA (ZWT), 16.00 mm x 16.00 mm |
| Operating Voltage | 1.8-V or 3.3-V LVCMOS I/Os (except for USB and DDR2 interfaces) |
Key Features
- Dual-Core SoC with ARM926EJ-S and C674x DSP cores
- ARM926EJ-S Core: 32-bit RISC processor with 32- and 16-bit instructions, ARM Jazelle technology, and embedded ICE-RT for real-time debug
- C674x DSP Core: Fixed- and floating-point VLIW DSP with up to 1600 MIPS and 1200 MFLOPS, 64 general-purpose registers, and support for IEEE floating-point operations
- Enhanced Direct Memory Access Controller 3 (EDMA3) with 64 independent DMA channels and 16 QDMA channels
- Programmable Real-Time Unit Subsystem (PRUSS) with two independent PRU cores
- USB 2.0 OTG interface, two I2C Bus interfaces, McASP, two McBSPs, and 10/100 Mbps Ethernet MAC
- Real-Time Clock (RTC) with 32-kHz oscillator and separate power rail
- Three 64-bit general-purpose timers and one 64-bit general-purpose or watchdog timer
- Two enhanced high-resolution pulse width modulators (eHRPWMs) and three 32-bit enhanced capture (eCAP) modules
Applications
- Professional or Private Mobile Radio (PMR)
- Industrial Automation
- Biometric Identification
- Smart Grid Substation Protection
- Industrial Portable Navigation Devices
Q & A
- What is the OMAP-L132 processor?
The OMAP-L132 is a dual-core SoC that combines an ARM926EJ-S RISC MPU and a TMS320C674x DSP core, designed for low-power applications. - What are the key features of the ARM926EJ-S core?
The ARM926EJ-S core is a 32-bit RISC processor with 32- and 16-bit instructions, ARM Jazelle technology, and embedded ICE-RT for real-time debug. - What are the capabilities of the C674x DSP core?
The C674x DSP core is a fixed- and floating-point VLIW DSP with up to 1600 MIPS and 1200 MFLOPS, supporting IEEE floating-point operations and featuring 64 general-purpose registers. - What memory interfaces does the OMAP-L132 support?
The OMAP-L132 supports DDR2/mDDR memory controllers, EMIFA for asynchronous and SDRAM, NOR, and NAND flash. - What peripherals are included in the OMAP-L132?
The peripherals include USB 2.0 OTG, two I2C Bus interfaces, McASP, two McBSPs, 10/100 Mbps Ethernet MAC, RTC, three 64-bit general-purpose timers, two eHRPWMs, and three eCAP modules. - What is the package type and size of the OMAP-L132?
The OMAP-L132 is packaged in a 361-ball Pb-Free PBGA (ZWT) with a size of 16.00 mm x 16.00 mm. - What are the typical applications of the OMAP-L132?
The typical applications include Professional or Private Mobile Radio (PMR), Industrial Automation, Biometric Identification, Smart Grid Substation Protection, and Industrial Portable Navigation Devices. - Does the OMAP-L132 support real-time debugging?
Yes, the OMAP-L132 supports real-time debugging through embedded ICE-RT. - What is the role of the PRUSS in the OMAP-L132?
The PRUSS (Programmable Real-Time Unit Subsystem) includes two independent PRU cores, each with 32-bit load-store RISC architecture, and can be disabled through software to save power. - How many DMA channels does the EDMA3 controller support?
The EDMA3 controller supports 64 independent DMA channels and 16 QDMA channels.
