Overview
The LMK05318B, produced by Texas Instruments, is a high-performance ultra-low jitter clock generator and network synchronizer. This device is designed to meet the stringent timing requirements of communications infrastructure and industrial applications. It utilizes Texas Instruments' proprietary Bulk Acoustic Wave (BAW) VCO technology to generate output clocks with exceptionally low jitter, independent of the jitter and frequency of the reference inputs. The LMK05318B supports advanced clock monitoring, hitless switching, and superior power supply noise rejection, making it ideal for applications requiring high precision and reliability.
Key Specifications
| Parameter | Description | Value |
|---|---|---|
| RMS Jitter | At 312.5 MHz (APLL1) | 50 fs |
| RMS Jitter | At 155.52 MHz (APLL2) | 125 fs |
| Reference Clock Inputs | Frequency Range | 10 to 100 MHz |
| Output Clocks | Number and Formats | Eight outputs, AC-LVDS, AC-CML, AC-LVPECL, HCSL, and 1.8-V LVCMOS |
| Supply Voltage | Core and Output | 3.3 V (core), 1.8 V, 2.5 V, or 3.3 V (output) |
| Operating Temperature | Industrial Range | -40 °C to +85 °C |
| Interface | I2C or SPI | |
| Package | Type and Size | VQFN (48), 7.00 mm × 7.00 mm |
Key Features
- One Digital Phase-Locked Loop (DPLL) with hitless switching, programmable loop bandwidth, and fastlock capability.
- Two Analog Phase-Locked Loops (APLLs) with industry-leading jitter performance.
- Priority-based input selection and digital holdover on loss of reference.
- EEPROM/ROM for custom clock configurations on power-up.
- Advanced clock monitoring and status reporting.
- Support for IEEE 1588 PTP slave clock with DCO mode and precise clock steering.
- Flexible configuration options including 1 Hz to 800 MHz on input and output.
- High power supply noise rejection (PSNR) of -83 dBc.
Applications
- SyncE (G.8262), SONET/SDH (Stratum 3/3E, G.813, GR-1244, GR-253), and Optical Transport Network (G.709).
- 400G Line Cards and fabric cards for Ethernet switches and routers.
- Wireless base stations (BTS) and wireless backhaul.
- Test and measurement, medical imaging.
- Jitter cleaning, wander attenuation, and reference clock generation for 56G/112G PAM-4 PHYs, ASICs, FPGAs, SoCs, and processors.
Q & A
- What is the RMS jitter of the LMK05318B at 312.5 MHz?
The RMS jitter at 312.5 MHz is 50 fs.
- How many output clocks does the LMK05318B support?
The device supports eight output clocks.
- What are the supported output formats of the LMK05318B?
The supported output formats include AC-LVDS, AC-CML, AC-LVPECL, HCSL, and 1.8-V LVCMOS.
- What is the operating temperature range of the LMK05318B?
The operating temperature range is -40 °C to +85 °C.
- Does the LMK05318B support IEEE 1588 PTP?
Yes, it supports IEEE 1588 PTP slave clock with DCO mode.
- How is the device configured for custom clock settings?
The device can be configured using EEPROM or ROM, and it is fully programmable through I2C or SPI interface.
- What is the power supply noise rejection (PSNR) of the LMK05318B?
The PSNR is -83 dBc.
- Can the LMK05318B handle hitless switching?
Yes, it supports hitless switching with phase cancellation.
- What types of reference clocks can the LMK05318B use?
The device can use TCXO, OCXO, or standard XO reference clocks.
- How is the device's start-up mode selected?
The start-up mode is selected using the HW_SW_CTRL input pin.
