Overview
The LMK00308SQX/NOPB is a 3-GHz, 8-output differential clock buffer and level translator produced by Texas Instruments. This device is designed for high-frequency, low-jitter clock and data distribution, making it ideal for various high-speed applications. It features a 3:1 input multiplexer that can select from two universal inputs operating up to 3.1 GHz or one crystal input accepting frequencies between 10 to 40 MHz. The selected input clock is distributed to two banks of four differential outputs and one LVCMOS output, offering flexibility in output configurations.
Key Specifications
Parameter | Test Conditions | Min | Typ | Max | Unit |
---|---|---|---|---|---|
Input Frequency Range (Universal Inputs) | - | - | Up to 3.1 GHz | - | GHz |
Input Frequency Range (Crystal Input) | - | 10 MHz | - | 40 MHz | MHz |
Output Voltage Swing (LVPECL) | RL = 100 Ω differential, TA = 25 °C | 250 mV | 350 mV | 450 mV | mV |
Output Rise Time (20% to 80%) | Uniform transmission line, RL = 100 Ω differential, CL ≤5 pF | 175 ps | 300 ps | - | ps |
Output Fall Time (80% to 20%) | Uniform transmission line, RL = 100 Ω differential, CL ≤5 pF | 175 ps | 300 ps | - | ps |
Additive RMS Jitter (LVPECL, 10 kHz to 1 MHz) | CLKin: 156.25 MHz | - | 20 fs | - | fs |
Power Supply Voltage (Core) | - | - | 3.3 V ± 5% | - | V |
Power Supply Voltage (Output) | - | - | 3.3 V/2.5 V ± 5% | - | V |
Operating Temperature Range | - | -40 °C | - | 85 °C | °C |
Package Type | - | - | WQFN (40 pins) | - | - |
Package Size | - | - | 6 mm × 6 mm | - | mm |
Key Features
- 3:1 input multiplexer with two universal inputs operating up to 3.1 GHz and one crystal input accepting 10 to 40 MHz.
- Two banks with four differential outputs each, configurable as LVPECL, LVDS, HCSL, or Hi-Z per bank.
- LVCMOS output with synchronous enable input for runt-pulse-free operation.
- Ultra-low additive jitter: 20 fs RMS (10 kHz to 1 MHz) and 51 fs RMS (12 kHz to 20 MHz) for LVPECL outputs.
- High power supply rejection ratio (PSRR): -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz.
- Pin-controlled configuration for output types.
- Three independent VCCO output supplies: 3.3 V/2.5 V ± 5%.
- Industrial temperature range: -40°C to +85°C.
Applications
- Clock distribution and level translation for ADCs, DACs, multi-gigabit Ethernet, XAUI, Fibre Channel, SATA/SAS, SONET/SDH, CPRI.
- Switches, routers, line cards, timing cards.
- Servers, computing, PCI Express (PCIe 3.0).
- Remote radio units and baseband units.
- High-frequency backplanes.
Q & A
- What is the maximum input frequency for the universal inputs of the LMK00308?
The universal inputs of the LMK00308 can operate up to 3.1 GHz.
- What types of output configurations are available for the LMK00308?
The outputs can be configured as LVPECL, LVDS, HCSL, or Hi-Z per bank.
- What is the typical additive RMS jitter for LVPECL outputs at 156.25 MHz?
The typical additive RMS jitter for LVPECL outputs at 156.25 MHz is 20 fs (10 kHz to 1 MHz) and 51 fs (12 kHz to 20 MHz).
- What is the power supply voltage range for the core and output supplies of the LMK00308?
The core supply voltage is 3.3 V ± 5%, and the output supplies can be either 3.3 V or 2.5 V ± 5%.
- What is the operating temperature range of the LMK00308?
The operating temperature range is -40°C to +85°C.
- What package type and size does the LMK00308 come in?
The LMK00308 comes in a 40-pin WQFN package with a size of 6 mm × 6 mm.
- What types of clock inputs can the LMK00308 accept?
The LMK00308 can accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clock inputs.
- Does the LMK00308 have a synchronous enable input for the LVCMOS output?
Yes, the LMK00308 has a synchronous enable input for the LVCMOS output to ensure runt-pulse-free operation.
- What are some common applications for the LMK00308?
Common applications include clock distribution and level translation for high-speed interfaces, switches, routers, servers, and remote radio units.
- How many differential output pairs does the LMK00308 provide?
The LMK00308 provides two banks with four differential output pairs each.