Overview
The DS90UR124-Q1, produced by Texas Instruments, is a critical component in the DS90URxxx-Q1 chipset. This chipset is designed to translate a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. It is specifically tailored for driving graphical data to displays that require 18-bit color depth, such as RGB666 + HS, VS, DE, and three additional general-purpose data channels. This single serial stream simplifies the transfer of a 24-bit bus over PCB traces and cables, eliminating skew problems between parallel data and clock paths, and thereby reducing system costs by minimizing the number of data paths, PCB layers, cable width, and connector size and pins.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Package | TQFP (64 pins) | - |
| Operating Temperature Range | -40 to 105 | °C |
| Pixel Clock Range | 5 MHz to 43 MHz | - |
| Interface Compression | 24:1 | - |
| Cable Length Capability | Up to 10 meters shielded twisted-pair cable | - |
| Power Supply Range | 3.3V ±10% | V |
| ESD Protection | Greater than 8kV HBM ESD structure | - |
| Package Size | 10.00mm × 10.00mm | mm |
Key Features
- Supports displays with 18-bit color depth (RGB666 + HS, VS, DE + three additional general-purpose data channels)
- Automotive-grade product, AEC-Q100 grade 2 qualified
- Embedded clock with DC balancing supports AC-coupled data transmission
- No reference clock required (deserializer)
- Hot plug support
- EMI reduction through spread spectrum input, data randomization, and shuffling on the serial link; adjustable PTO (Progressive Turnon) LVCMOS outputs
- @Speed BIST (Built-In Self-Test) to validate LVDS transmission path
- Individual power-down controls for both transmitter and receiver
- Pre-emphasis to boost signals over longer distances using lossy cables
- Internal DC-balanced encoding and decoding for AC-coupled interconnects
Applications
- Automotive central information displays
- Automotive instrument cluster displays
- Automotive heads-up displays
- Remote camera-based driver assistance systems
Q & A
- What is the primary function of the DS90UR124-Q1 chipset?
The DS90UR124-Q1 chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information.
- What is the supported color depth for displays using this chipset?
The chipset supports displays with 18-bit color depth (RGB666 + HS, VS, DE + three additional general-purpose data channels).
- What is the operating temperature range of the DS90UR124-Q1?
The operating temperature range is -40°C to 105°C.
- What is the maximum length of cable that the DS90UR124-Q1 can drive?
The device can drive up to 10 meters of shielded twisted-pair cable.
- Does the DS90UR124-Q1 require a reference clock?
No, the deserializer does not require a reference clock.
- What EMI reduction features does the DS90UR124-Q1 have?
The device features EMI reduction through spread spectrum input, data randomization, and shuffling on the serial link, as well as adjustable PTO (Progressive Turnon) LVCMOS outputs.
- What is the purpose of the @Speed BIST feature in the DS90UR124-Q1?
The @Speed BIST (Built-In Self-Test) is used to validate the LVDS transmission path.
- Can the DS90UR124-Q1 be used in automotive applications?
- What is the power supply range for the DS90UR124-Q1?
- Does the DS90UR124-Q1 support hot plug operations?
