Overview
The CDCM1802RGTR is a clock buffer with programmable divider, designed by Texas Instruments. This device distributes one pair of differential clock input to one LVPECL differential clock output pair (Y0 and Y0) and one single-ended LVCMOS output (Y1). It is specifically engineered for driving 50-Ω transmission lines, making it suitable for various high-speed applications. The CDCM1802 features a 3.3-V power supply (with 2.5-V functional capability) and operates over a temperature range of -40°C to 85°C. The device includes control pins for selecting different output modes and an enable pin to disable or enable all outputs simultaneously.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Package | VQFN (RGT) | - |
| Pins | 16 | - |
| Operating Temperature Range | -40 to 85 | °C |
| Power Supply Voltage | 3.3 V (2.5 V functional) | V |
| LVPECL Signaling Rate | Up to 800 MHz | MHz |
| LVCMOS Signaling Rate | Up to 200 MHz | MHz |
| Output Skew (LVCMOS to LVPECL) | 1.6 ns | ns |
| Receiver Input Threshold | ±75 mV | mV |
| Output Capacitance | 2 pF | pF |
| Propagation Delay (Rising Edge) | 1.6 to 2.6 ns | ns |
| Propagation Delay (Falling Edge) | 1.6 to 2.6 ns | ns |
| Output Rise Slew Rate | 1.4 to 2.3 V/ns | V/ns |
| Output Fall Slew Rate | 1.4 to 2.3 V/ns | V/ns |
Key Features
- Distributes one differential clock input to one LVPECL differential clock output and one LVCMOS single-ended output.
- Programmable output divider for both LVPECL and LVCMOS outputs.
- 1.6-ns output skew between LVCMOS and LVPECL transitions to minimize noise.
- Differential input stage with wide common-mode range and VBB bias voltage output for single-ended input signals.
- Receiver input threshold of ±75 mV.
- 16-pin VQFN package (3 mm x 3 mm).
- Control pins (S0 and S1) for selecting different output mode settings and an enable pin (EN) to disable or enable all outputs simultaneously.
Applications
- Networking and Data Communications
- Medical Imaging
- Portable Test and Measurement
- High-end Audio/Video (A/V) Systems
Q & A
- What is the primary function of the CDCM1802?
The CDCM1802 distributes one pair of differential clock input to one LVPECL differential clock output and one single-ended LVCMOS output.
- What is the signaling rate for LVPECL and LVCMOS outputs?
The signaling rate is up to 800 MHz for LVPECL and up to 200 MHz for LVCMOS.
- What is the output skew between LVCMOS and LVPECL transitions?
The output skew is 1.6 ns to minimize noise impact during signal transitions.
- What is the power supply voltage for the CDCM1802?
The power supply voltage is 3.3 V, with functional capability at 2.5 V.
- How many control pins does the CDCM1802 have and what is their function?
The CDCM1802 has two control pins (S0 and S1) to select different output mode settings and an enable pin (EN) to disable or enable all outputs simultaneously.
- What is the operating temperature range of the CDCM1802?
The operating temperature range is -40°C to 85°C.
- What type of package does the CDCM1802 come in?
The CDCM1802 comes in a 16-pin VQFN (RGT) package.
- What is the receiver input threshold of the CDCM1802?
The receiver input threshold is ±75 mV.
- Can the CDCM1802 be used for single-ended driver applications?
Yes, the CDCM1802 provides a VBB output pin that can be used as a common-mode voltage reference for single-ended input signals.
- What are some typical applications of the CDCM1802?
Typical applications include networking and data communications, medical imaging, portable test and measurement, and high-end A/V systems.
