Overview
The LMK00306SQ/NOPB, produced by Texas Instruments, is a 3-GHz, 6-output differential clock buffer and level translator. This device is designed for high-frequency, low-jitter clock and data distribution, making it ideal for various high-speed applications. It features a 3:1 input multiplexer, allowing selection from two universal inputs or one crystal input, and distributes the selected clock to two banks of three differential outputs each, along with one LVCMOS output. The device operates from a 3.3 V core supply and three independent 3.3 V or 2.5 V output supplies, ensuring high performance, versatility, and power efficiency.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Input Frequency Range (Universal Inputs) | - | - | 3.1 GHz | - |
| Input Frequency Range (Crystal Input) | 10 MHz | - | 40 MHz | - |
| Core Supply Voltage (Vcc) | 3.3 V - 5% | 3.3 V | 3.3 V + 5% | V |
| Output Supply Voltage (Vcco) | 2.5 V - 5% | 2.5 V / 3.3 V | 2.5 V + 5% / 3.3 V + 5% | V |
| Operating Temperature Range | -40°C | - | 85°C | °C |
| LVPECL Additive Jitter (10 kHz to 1 MHz) | - | 20 fs RMS | - | fs |
| LVPECL Additive Jitter (12 kHz to 20 MHz) | - | 51 fs RMS | - | fs |
| PSRR (LVPECL/LVDS at 156.25 MHz) | -65 dBc / -76 dBc | - | - | dBc |
| Package Type | - | - | 36-lead WQFN (6 mm × 6 mm) | - |
Key Features
- 3:1 input multiplexer with two universal inputs and one crystal input.
- Accepts LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clocks.
- Two banks with three differential outputs each, configurable as LVPECL, LVDS, HCSL, or Hi-Z.
- LVCMOS output with synchronous enable input for runt-pulse-free operation.
- High PSRR: -65 dBc (LVPECL) and -76 dBc (LVDS) at 156.25 MHz.
- Pin-controlled configuration for output types and enable/disable functions.
- Industrial temperature range: -40°C to +85°C.
Applications
- Clock distribution and level translation for ADCs, DACs, multi-gigabit Ethernet, XAUI, Fibre Channel, SATA/SAS, SONET/SDH, CPRI.
- Switches, routers, line cards, timing cards.
- Servers, computing, PCI Express (PCIe 3.0).
- Remote radio units and baseband units.
- High-frequency backplanes.
Q & A
- What is the maximum input frequency for the universal inputs of the LMK00306?
The maximum input frequency for the universal inputs is 3.1 GHz.
- What types of clock signals can the LMK00306 accept?
The LMK00306 can accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clock signals.
- How many differential outputs does the LMK00306 provide?
The LMK00306 provides two banks with three differential outputs each.
- What is the operating temperature range of the LMK00306?
The operating temperature range is -40°C to +85°C.
- What is the typical additive jitter for LVPECL outputs at 156.25 MHz?
The typical additive jitter for LVPECL outputs at 156.25 MHz is 20 fs RMS (10 kHz to 1 MHz) and 51 fs RMS (12 kHz to 20 MHz).
- What is the PSRR for LVPECL and LVDS outputs at 156.25 MHz?
The PSRR is -65 dBc for LVPECL and -76 dBc for LVDS at 156.25 MHz.
- What types of output configurations are available for each bank?
Each bank can be configured as LVPECL, LVDS, HCSL, or Hi-Z.
- Does the LMK00306 have an LVCMOS output?
- What is the package type of the LMK00306?
The package type is a 36-lead WQFN (6 mm × 6 mm).
- What are some common applications of the LMK00306?
