Overview
The STNRG011TR, produced by STMicroelectronics, is a digital combo multi-mode Power Factor Correction (PFC) and time-shift LLC resonant half-bridge controller. This device is designed to manage the optimal operation of three main blocks: a multi-mode (transition-mode and DCM) PFC controller, a high-voltage double-ended controller for the LLC resonant half-bridge, and an 800 V-rated startup generator. It incorporates a sophisticated digital engine with advanced algorithms to ensure high performance, BOM optimization, and robustness. The device is housed in a 20-pin SO package and is intended for power-factor-corrected high-efficiency converters that need to comply with stringent energy-saving regulations.
Key Specifications
| Parameter | Description | Value | Unit |
|---|---|---|---|
| VVAC | Voltage range | -1 to 800 | V |
| VBOOT | Floating supply voltage, referred to GND | -0.3 to VCORE + 0.3 | V |
| Tj | Junction temperature operating range | -40 to 150 | °C |
| Tstg | Storage temperature | -55 to 150 | °C |
| Rth j-amb | Max. thermal resistance, junction to ambient | 120 | °C/W |
| PFC_GD | PFC gate-driver output current | 0.7 A source, 0.8 A sink | A |
| Package | Package type | 20-pin SO |
Key Features
- Digital combo multi-mode PFC and time-shift LLC resonant half-bridge controller
- Onboard 800 V startup circuit, line sense, and X-cap discharge compliant with IEC 62368-1 for reduced standby power
- Enhanced fixed on-time multi-mode TM PFC controller with input voltage feed-forward, THD optimizer, and frequency limitation
- Complete set of PFC and half-bridge protections
- Enhanced burst-mode at light load with fast transient response and line adaptive half-bridge brown-out protection
- External communication through a 2-pin UART for monitoring, black box storage, and software patch upload
- Advanced digital algorithms and HW analog IPs for high performance and BOM optimization
- Non-volatile memory (NVM) for storing key application parameters and calibration during production
Applications
- Open frame SMPS
- Flat screen TV SMPS
- ATX power supply
- AC-DC adapters
Q & A
- What is the primary function of the STNRG011TR?
The STNRG011TR is a digital combo multi-mode PFC and time-shift LLC resonant half-bridge controller, designed to manage the optimal operation of PFC and LLC blocks in high-efficiency converters.
- What package type does the STNRG011TR come in?
The STNRG011TR is housed in a 20-pin SO package.
- What are the key protections provided by the STNRG011TR?
The device includes a complete set of PFC and half-bridge protections, including brown-out, surge detection, line disconnection, and overtemperature protection.
- How does the STNRG011TR manage startup and VCC?
The device features an 800 V-rated startup generator and manages VCC through an internal current source that charges the capacitor connected between the VCC pin and GND until the startup threshold is reached.
- What communication capabilities does the STNRG011TR have?
The device supports external communication through a 2-pin UART for monitoring, black box storage, and software patch upload.
- What are the typical applications of the STNRG011TR?
The STNRG011TR is used in open frame SMPS, flat screen TV SMPS, ATX power supplies, and AC-DC adapters.
- How does the STNRG011TR optimize power management?
The device uses advanced digital algorithms and a power management and burst-mode engine to achieve very low idle consumption and fast activity restart during burst-mode operation.
- What safety standards does the STNRG011TR comply with?
The device complies with IEC 62368-1 for reduced standby power and includes features such as X-cap discharge and line sense to meet safety regulations.
- How does the STNRG011TR handle line surges?
The device detects surges on the VAC pin and stops PFC activity for one half-cycle during a surge; if detected during PFC soft-start, the system shuts down with a not latched fault.
- What is the role of the SMEDs in the STNRG011TR?
The State Machine Event Driven (SMEDs) manage the PFC and LLC external MOSFET gates, driven by external events and analog comparators outputs, to optimize the operation of the power system.
