Overview
The MPC860DEVR80D4, part of the MPC860 PowerQUICC family, is a versatile one-chip integrated microprocessor and peripheral solution designed by Freescale Semiconductor. This device is particularly suited for a variety of communications and networking controller applications. It implements Power Architecture technology and includes a superset of features from Freescale’s MC68360 quad integrated communications controller (QUICC).
Key Specifications
| Characteristic | Value | Unit |
|---|---|---|
| Operating Voltage (at 40 MHz or less) | 3.0 - 3.6 | V |
| Operating Voltage (greater than 40 MHz) | 3.135 - 3.465 | V |
| Input High Voltage (all inputs except EXTAL and EXTCLK) | 2.0 - 5.5 | V |
| Maximum Frequency | Up to 80 MHz | |
| Data Cache | 4-Kbyte or 8-Kbyte | |
| Instruction Cache | 4-Kbyte or 16-Kbyte | |
| Data Bus Width | Up to 32 bits (dynamic bus sizing for 8, 16, and 32 bits) | |
| Address Lines | 32 | |
| Memory Controller | Eight banks, glueless interface to DRAM, SIMMS, SRAM, EPROM, Flash EPROM | |
| General-Purpose Timers | Four 16-bit timers or two 32-bit timers |
Key Features
- Embedded Core: Single-issue, 32-bit core implementing Power Architecture technology with thirty-two 32-bit general-purpose registers (GPRs). The core performs branch prediction with conditional prefetch without conditional execution.
- Caches: 4-Kbyte or 8-Kbyte data cache and 4-Kbyte or 16-Kbyte instruction cache. Caches are physically addressed, implement a least recently used (LRU) replacement algorithm, and are lockable on a cache block basis.
- Memory Management Units (MMUs): With 32-entry TLB, fully-associative instruction and data TLBs. Supports multiple page sizes and 16 virtual address spaces.
- Memory Controller: Eight banks, glueless interface to DRAM, SIMMS, SRAM, EPROM, Flash EPROM, and other memory devices. Programmable to support various size and speed memory interfaces.
- General-Purpose Timers: Four 16-bit timers or two 32-bit timers with gate mode and interrupt capabilities.
- System Integration Unit (SIU): Includes bus monitor, software watchdog, periodic interrupt timer (PIT), low-power stop mode, clock synthesizer, decrementer, time base, and real-time clock (RTC).
- Communications Processor Module (CPM): RISC communications processor with communication-specific commands and support for continuous mode transmission and reception on all serial channels.
- Serial DMA (SDMA) Channels: Up to 16 SDMA channels.
- Baud-Rate Generators (BRGs): Four independent BRGs that can be tied to any SCC or SMC.
- Parallel Interface Port (PIP): Centronics interface support and fast connection between compatible ports.
- PCMCIA Interface: Master (socket) interface, release 2.1 compliant, supporting two independent PCMCIA sockets.
- Low Power Modes: Full on, doze, sleep, deep sleep, and power-down modes.
Applications
The MPC860DEVR80D4 is designed for a variety of communications and networking controller applications. It is particularly suited for use in:
- Networking equipment such as routers and switches.
- Telecommunications systems, including voice and data communication devices.
- Embedded systems requiring high-performance processing and advanced communication capabilities.
- Industrial control systems that need robust and reliable communication interfaces.
- Other applications requiring integrated processor and peripheral solutions for efficient data processing and communication.
Q & A
- What is the MPC860DEVR80D4?
The MPC860DEVR80D4 is a part of the MPC860 PowerQUICC family, an integrated microprocessor and peripheral solution designed for communications and networking applications.
- What is the maximum operating frequency of the MPC860DEVR80D4?
The MPC860DEVR80D4 can operate at frequencies up to 80 MHz.
- What types of caches does the MPC860DEVR80D4 have?
The device has 4-Kbyte or 8-Kbyte data cache and 4-Kbyte or 16-Kbyte instruction cache.
- What is the memory controller capability of the MPC860DEVR80D4?
The memory controller supports eight banks and provides a glueless interface to DRAM, SIMMS, SRAM, EPROM, and Flash EPROM.
- Does the MPC860DEVR80D4 support low power modes?
Yes, it supports full on, doze, sleep, deep sleep, and power-down modes.
- What is the role of the Communications Processor Module (CPM) in the MPC860DEVR80D4?
The CPM is a RISC communications processor that supports communication-specific commands and continuous mode transmission and reception on all serial channels.
- How many serial DMA (SDMA) channels does the MPC860DEVR80D4 have?
The device has up to 16 SDMA channels.
- What is the PCMCIA interface capability of the MPC860DEVR80D4?
The device supports a master (socket) interface, release 2.1 compliant, with two independent PCMCIA sockets.
- What are the key features of the System Integration Unit (SIU) in the MPC860DEVR80D4?
The SIU includes a bus monitor, software watchdog, periodic interrupt timer (PIT), low-power stop mode, clock synthesizer, decrementer, time base, and real-time clock (RTC).
- What types of general-purpose timers are available on the MPC860DEVR80D4?
The device has four 16-bit timers or two 32-bit timers with gate mode and interrupt capabilities.
