Overview
The NB3L202K is a differential 1:2 clock fanout buffer produced by onsemi, designed with High-speed Current Steering Logic (HCSL) outputs. This component is optimized for ultra-low phase noise, propagation delay variation, and low output-to-output skew, making it ideal for distributing low skew clocks across various systems. It operates at supply voltages of 2.5 V ±5% and 3.3 V ±10% and can accept differential LVPECL, LVDS, and HCSL input signals, as well as single-ended LVPECL, HCSL, LVCMOS, or LVTTL levels with a proper external Vth reference supply. The NB3L202K provides two identical HCSL output copies operating up to 350 MHz and is DB200H compliant and PCIe Gen 3 and Gen 4 compliant.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Maximum Input Clock Frequency | - | - | 350 | MHz |
| Supply Voltage Operation | 2.5 ±5% | 3.3 ±10% | - | V |
| Output Drive Current Setting Resistor | - | 475 Ω | - | Ω |
| Output-to-Output Skew | 0 | - | 20 | ps |
| Propagation Delay | 0.6 | 1.0 | 1.4 | ns |
| Rise and Fall Times | 175 | 500 | 700 | ps |
| Additive RMS Phase Jitter | - | - | 80 | fs |
| Ambient Operating Temperature | -40 | - | 85 | °C |
| Package Type | - | - | QFN 16-pin, 3 mm x 3 mm | - |
Key Features
- Ultra-low phase noise and propagation delay variation
- Low output-to-output skew of up to 20 ps
- DB200H compliant and PCIe Gen 3 and Gen 4 compliant
- Individual OE control pin for each output
- Accepts differential LVPECL, LVDS, and HCSL input signals
- Accepts single-ended LVPECL, HCSL, LVCMOS, or LVTTL levels with external Vth reference
- Outputs can interface to LVDS receivers when properly terminated
- Pb-free and RoHS compliant
Applications
- PCI Express
- FBDIMM
- Mobile Computing
- Networking
- Gigabit Ethernet
Q & A
- What is the maximum input clock frequency of the NB3L202K?
The maximum input clock frequency is 350 MHz.
- What are the supported supply voltage ranges for the NB3L202K?
The component operates at 2.5 V ±5% and 3.3 V ±10%.
- How is the output drive current set in the NB3L202K?
The output drive current is set by connecting a 475 Ω resistor from the IREF pin to GND.
- What is the maximum output-to-output skew of the NB3L202K?
The maximum output-to-output skew is 20 ps.
- What is the typical propagation delay of the NB3L202K?
The typical propagation delay is 1.0 ns.
- Can the NB3L202K outputs interface with LVDS receivers?
Yes, the outputs can interface with LVDS receivers when properly terminated.
- What are the typical applications of the NB3L202K?
Typical applications include PCI Express, FBDIMM, Mobile Computing, Networking, and Gigabit Ethernet.
- Is the NB3L202K compliant with any specific standards?
Yes, it is DB200H compliant and PCIe Gen 3 and Gen 4 compliant.
- What is the package type of the NB3L202K?
The package type is QFN 16-pin, 3 mm x 3 mm.
- Is the NB3L202K Pb-free and RoHS compliant?
Yes, it is Pb-free and RoHS compliant.
