Overview
The PTN3460IBS/F2MP is a DisplayPort to LVDS bridge device manufactured by NXP USA Inc. This component is designed to enable connectivity between an embedded DisplayPort (eDP) source and an LVDS display panel. It processes the incoming DisplayPort stream, performs the necessary protocol conversion, and transmits the processed stream in LVDS format. The device is particularly suited for industrial and embedded applications due to its wide temperature range and high flexibility in configuration options.
Key Specifications
| Parameter | Specification |
|---|---|
| Package Type | HVQFN56 7 mm x 7 mm with 0.4 mm pitch |
| Temperature Range | -40°C to +85°C |
| Supply Voltage | 3.3 V (single supply) or 3.3 V/1.8 V (dual supplies) |
| DisplayPort Version | Compliant to DP v1.2a and v1.1a, eDP v1.2 and v1.1 |
| Main Link Rate | Reduced Bit Rate (1.62 Gbit/s) and High Bit Rate (2.7 Gbit/s) |
| AUX Channel | 1 Mbit/s, supports Native AUX and I2C-over-AUX |
| LVDS Bus Operation | Single bus or dual bus, up to 224 mega pixels per second |
| Color Depth | 18 bits per pixel or 24 bits per pixel |
| Pixel Clock Frequency | Up to 112 MHz |
| LVDS Data Packing | VESA or JEIDA format |
| I2C Interface | Up to 400 kbit/s |
Key Features
- Embedded microcontroller and on-chip Non-Volatile Memory (NVM) for flexibility in firmware updates
- LVDS panel power-up/down sequencing control and firmware-controlled timing parameters
- No external timing reference needed
- EDID ROM emulation to support panels with no EDID ROM
- Supports EDID structure v1.3 and up to seven different EDID data structures
- eDP complying PWM signal generation or PWM signal pass through from eDP source
- Programmable center spreading of pixel clock frequency to minimize EMI
- Programmable LVDS signal swing to pre-compensate for channel attenuation or allow for power saving
- PCB routing flexibility by programming for LVDS bus swapping, channel swapping, and differential signal pair swapping
- Data Enable polarity programming and DDC control for EDID ROM access
Applications
The PTN3460IBS/F2MP is suitable for a variety of industrial and embedded applications, including:
- Industrial display systems
- Embedded systems requiring DisplayPort to LVDS conversion
- High-resolution display panels in various industries
- Systems requiring flexible configuration and high reliability
Q & A
- What is the primary function of the PTN3460IBS/F2MP?
The primary function is to convert DisplayPort (DP) signals to LVDS format for display panels.
- What are the supported DisplayPort versions?
The device is compliant to DP v1.2a and v1.1a, as well as eDP v1.2 and v1.1.
- What are the supported main link rates?
The device supports Reduced Bit Rate (1.62 Gbit/s) and High Bit Rate (2.7 Gbit/s).
- What is the temperature range of the PTN3460IBS/F2MP?
The temperature range is -40°C to +85°C.
- What supply voltages does the PTN3460IBS/F2MP support?
The device can be powered by either 3.3 V (single supply) or 3.3 V/1.8 V (dual supplies).
- Does the PTN3460IBS/F2MP support EDID ROM emulation?
- What is the maximum pixel clock frequency supported?
The maximum pixel clock frequency is up to 112 MHz.
- Can the PTN3460IBS/F2MP handle dual LVDS bus operation?
- What is the purpose of the I2C interface on the PTN3460IBS/F2MP?
The I2C interface is used for EDID ROM access and other control functions, up to 400 kbit/s.
- Does the PTN3460IBS/F2MP require an external timing reference?
No, it does not require an external timing reference.
