Overview
The SMP08FSZ, produced by Analog Devices Inc., is a monolithic octal sample-and-hold integrated circuit. It features eight internal buffer amplifiers, an input multiplexer, and internal hold capacitors. This device is designed to minimize board space in systems that require cycled calibration or an array of control voltages. The SMP08FSZ is particularly useful in conjunction with low-cost digital-to-analog converters (D/A) in microprocessor-based systems, offering break-before-make switching and an internal decoder, thus eliminating the need for external logic.
Key Specifications
Parameter | Symbol | Conditions | Min | Typ | Max | Units |
---|---|---|---|---|---|---|
Linearity Error | - | -3 V ≤ VIN ≤ +3 V | 0.01 % | - | - | % |
Buffer Offset Voltage | VOS | TA = +25°C, VIN = 0 V | 2.5 | 10 | mV | |
Buffer Offset Voltage | VOS | -40°C ≤ TA ≤ +85°C, VIN = 0 V | 3.5 | 20 | mV | |
VHS | VIN = 0 V, TA = +25°C to +85°C | 2.5 | 4 | mV | ||
VHS | VIN = 0 V, TA = -40°C | 5 | - | mV | ||
Droop Rate | ∆VCH/∆t | TA = +25°C, VIN = 0 V | 2 | 20 | mV/s | |
Output Source Current | ISOURCE | VIN = 0 V | - | 1.2 | mA | |
Output Sink Current | ISINK | VIN = 0 V | - | 0.5 | mA | |
Output Voltage Range | - | RL = 20 kΩ | -3.0 | - | +3.0 | V |
Logic Input High Voltage | VINH | - | - | - | 2.4 | V |
Logic Input Low Voltage | VINL | - | - | - | 0.8 | V |
Logic Input Current | IIN | VIN = 2.4 V | - | 0.5 | 1 µA | |
Supply Voltage Range | - | - | 7 | - | 15 | V |
Package Type | - | - | - | - | 16-SOIC | - |
Key Features
- Octal Sample-and-Hold: Features eight internal buffer amplifiers and internal hold capacitors.
- Multiplexed Input: Includes an input multiplexer, allowing for the selection of one of eight input channels.
- Break-Before-Make Switching: Ensures that the switch opens before it closes, preventing channel-to-channel crosstalk.
- Internal Decoder: No external logic is required for channel selection.
- TTL/CMOS Compatibility: Internally regulated TTL supply maintains compatibility over the full supply range.
- Single or Dual Supply Operation: Capable of operating with either single or dual supplies over a voltage range of 7 to 15 volts.
- Low Droop Rate: A droop rate of 20 mV/s, requiring a refresh every 500 ms for 8-bit DAC accuracy.
Applications
- Microprocessor-Based Systems: Easily integrated into systems requiring cycled calibration or an array of control voltages.
- D/A Converter Systems: Used in conjunction with low-cost D/A converters to sample and hold multiple output voltages.
- Industrial Control Systems: Suitable for applications where precise voltage control and sampling are necessary.
- Medical and Scientific Instruments: Ideal for applications requiring high accuracy and stability in voltage sampling and holding.
Q & A
- What is the SMP08FSZ?
The SMP08FSZ is a monolithic octal sample-and-hold integrated circuit produced by Analog Devices Inc.
- What are the key components of the SMP08FSZ?
The SMP08FSZ includes eight internal buffer amplifiers, an input multiplexer, and internal hold capacitors.
- What is the supply voltage range for the SMP08FSZ?
The SMP08FSZ can operate with either single or dual supplies over a voltage range of 7 to 15 volts.
- What is the droop rate of the SMP08FSZ?
The droop rate is 20 mV/s, requiring a refresh every 500 ms for 8-bit DAC accuracy.
- What package type is the SMP08FSZ available in?
The SMP08FSZ is available in a 16-SOIC package.
- Does the SMP08FSZ require external logic for channel selection?
No, the SMP08FSZ has an internal decoder, eliminating the need for external logic.
- What is the typical application of the SMP08FSZ with a D/A converter?
The SMP08FSZ is used to sample and hold multiple output voltages from a D/A converter in microprocessor-based systems.
- How does the SMP08FSZ handle channel switching?
The SMP08FSZ features break-before-make switching to prevent channel-to-channel crosstalk.
- What are the logic input voltage levels for the SMP08FSZ?
The logic input high voltage is 2.4 V, and the logic input low voltage is 0.8 V.
- What is the recommended refresh rate for maintaining accuracy in an 8-bit DAC system?
The refresh rate must be less than 500 ms to maintain 1/2 LSB accuracy.