Overview
The ADSP-BF561SKBZ600, produced by Analog Devices Inc., is a high-performance embedded symmetric multiprocessor belonging to the Blackfin Processor family. This device features two independent Blackfin cores, each capable of operating at 600 MHz and delivering 1200 MMACs (million multiply-accumulate operations per second), resulting in a total of 2400 MMACs. This dual-core architecture is designed to handle demanding signal processing tasks, making it ideal for a wide range of applications including industrial, instrumentation, medical, and consumer multimedia.
The ADSP-BF561 is characterized by its high level of integration, including extensive on-chip memory, advanced peripherals, and dynamic power management. This makes it a versatile solution for complex control and signal processing tasks while maintaining high data throughput.
Key Specifications
| Specification | Description |
|---|---|
| Processor Cores | Dual symmetric 600 MHz Blackfin cores |
| On-Chip Memory | 328 KBytes (32 KBytes L1 instruction SRAM/cache per core, 64 KBytes L1 data SRAM/cache per core, 4 KBytes L1 scratchpad SRAM per core, 128 KBytes shared L2 memory) |
| Memory Controller | 32-bit Memory Controller supporting SDRAM, SRAM, Flash, or ROM |
| Peripheral Interfaces | Two Parallel Peripheral Interface Units, two dual-channel synchronous serial ports, SPI-compatible port, UART with IrDA support |
| Timers/Counters | 12 general-purpose 32-bit timers/counters with PWM capability |
| Programmable Flags | 48 programmable flags (GPIO) |
| Watchdog Timers | Dual watchdog timers |
| Phase-Locked Loop | Capable of 0.5× to 64× frequency multiplication |
| Package Options | 256-ball CSP_BGA and 297-ball PBGA |
Key Features
- Dual symmetric 600 MHz high-performance Blackfin cores with dual-MAC state-of-the-art signal processing engines and RISC-like instruction set architecture.
- Extensive on-chip memory including L1 instruction and data SRAM/cache, scratchpad SRAM, and shared L2 memory.
- Advanced peripherals such as dual-channel DMA controllers, SPI-compatible port, UART with IrDA support, and parallel peripheral interface units.
- Dynamic Power Management (DPM) functionality for efficient power usage.
- High data throughput tailored for imaging and consumer multimedia applications.
- Application Tuned Peripherals for glueless connectivity to various audio/video converters and ADCs/DACs.
- Wide range of operating voltages and package options (256-ball CSP_BGA and 297-ball PBGA).
Applications
- Industrial applications: control systems, automation, and industrial instrumentation.
- Instrumentation: medical devices, diagnostic equipment, and scientific instruments.
- Medical applications: medical imaging, patient monitoring systems, and medical diagnostics.
- Consumer multimedia: imaging, video processing, and audio processing in consumer electronics.
- Telecommunications: signal processing in communication systems.
Q & A
- What is the processing power of the ADSP-BF561?
The ADSP-BF561 features two Blackfin cores, each capable of 600 MHz and delivering 1200 MMACs, totaling 2400 MMACs.
- How much on-chip memory does the ADSP-BF561 have?
The ADSP-BF561 has 328 KBytes of on-chip memory, including L1 instruction and data SRAM/cache, scratchpad SRAM, and shared L2 memory.
- What types of peripheral interfaces does the ADSP-BF561 support?
The ADSP-BF561 supports two parallel peripheral interface units, two dual-channel synchronous serial ports, an SPI-compatible port, and a UART with IrDA support.
- Does the ADSP-BF561 have any power management features?
Yes, the ADSP-BF561 includes Dynamic Power Management (DPM) functionality for efficient power usage.
- What are the package options for the ADSP-BF561?
The ADSP-BF561 is available in 256-ball CSP_BGA and 297-ball PBGA packages.
- What types of applications is the ADSP-BF561 suited for?
The ADSP-BF561 is suited for industrial, instrumentation, medical, and consumer multimedia applications.
- Does the ADSP-BF561 support any specific video formats?
Yes, it supports ITU-R 656 video data formats through its parallel peripheral interface units.
- How many timers/counters does the ADSP-BF561 have?
The ADSP-BF561 has 12 general-purpose 32-bit timers/counters with PWM capability.
- What is the role of the phase-locked loop in the ADSP-BF561?
The phase-locked loop is capable of 0.5× to 64× frequency multiplication.
- Does the ADSP-BF561 have any watchdog timers?
Yes, it features dual watchdog timers.
