Overview
The ADSP-2171BS-133, produced by Analog Devices Inc., is a single-chip microcomputer optimized for digital signal processing (DSP) and other high-speed numeric processing applications. This device is part of the ADSP-217x family, which includes the ADSP-2171, ADSP-2172, and ADSP-2173. The ADSP-2171 and ADSP-2172 are designed for 5.0 V applications, while the ADSP-2173 is designed for 3.3 V applications. The ADSP-217x series combines the ADSP-2100 base architecture with enhanced features such as two serial ports, a host interface port, a programmable timer, and extensive interrupt capabilities.
Key Specifications
Specification | Details |
---|---|
Instruction Cycle Time | 30 ns (33 MIPS) from 16.67 MHz Crystal at 5.0 V, 50 ns (20 MIPS) from 10 MHz Crystal at 3.3 V |
On-Chip Program Memory RAM | 2K words (24-bit) |
On-Chip Data Memory RAM | 2K words (16-bit) |
On-Chip Program Memory ROM (ADSP-2172) | 8K words (24-bit) |
Host Interface Port | 8- or 16-Bit Parallel Host Interface Port |
Power Dissipation | 300 mW at 5.0 V at 30 ns, 70 mW at 3.3 V at 50 ns |
Package | 128-Lead TQFP and 128-Lead PQFP |
Powerdown Mode |
Key Features
- ADSP-2100 Family Code & Function Compatible with new instruction set enhancements for bit manipulation, multiplication, biased rounding, and global interrupt masking.
- Bus Grant Hang Logic (BGH) feature.
- Dual-purpose program memory for both instruction and data storage.
- Independent ALU, multiplier/accumulator, and barrel shifter computational units.
- Two independent data address generators and a powerful program sequencer providing zero overhead looping and conditional instruction execution.
- Two double-buffered serial ports with companding hardware and automatic data buffering.
- Programmable 16-bit interval timer with prescaler.
- Automatic booting of internal program memory from byte-wide external memory or through the host interface port.
- Single-cycle instruction execution and single-cycle context switch.
- Three edge- or level-sensitive external interrupts.
Applications
The ADSP-2171BS-133 is suitable for a variety of high-speed numeric processing and digital signal processing applications. These include:
- Digital signal processing in audio, image, and video systems.
- High-speed numeric processing in scientific and engineering applications.
- Embedded systems requiring low power consumption and high computational efficiency.
- Portable equipment where low power modes are essential.
- Industrial control systems and automation.
Q & A
- What is the instruction cycle time of the ADSP-2171BS-133 at 5.0 V?
The instruction cycle time is 30 ns, which corresponds to 33 MIPS from a 16.67 MHz crystal at 5.0 V.
- How much on-chip program memory RAM does the ADSP-2171BS-133 have?
The device has 2K words (24-bit) of on-chip program memory RAM.
- What types of packages are available for the ADSP-2171BS-133?
The device is available in 128-Lead TQFP and 128-Lead PQFP packages.
- What is the power dissipation of the ADSP-2171BS-133 at 5.0 V and 3.3 V?
The typical power dissipation is 300 mW at 5.0 V at 30 ns and 70 mW at 3.3 V at 50 ns.
- Does the ADSP-2171BS-133 support powerdown modes?
Yes, the device features powerdown circuitry with less than 0.55 mW (ADSP-2171/ADSP-2172) or 0.36 mW (ADSP-2173) CMOS standby power dissipation).
- What are the key enhancements in the instruction set of the ADSP-217x series?
The instruction set includes new bit manipulation instructions, new ALU constants, a new multiplication instruction (x squared), biased rounding, and global interrupt masking).
- How many serial ports does the ADSP-2171BS-133 have?
The device has two double-buffered serial ports with companding hardware and automatic data buffering).
- Can the ADSP-2171BS-133 be used in battery-operated portable equipment?
Yes, the device is suitable for battery-operated portable equipment due to its low power consumption and powerdown modes).
- What is the purpose of the host interface port on the ADSP-2171BS-133?
The host interface port allows the host processor to initialize the ADSP-217x’s on-chip memory and provides a parallel interface for data transfer).
- How many external interrupts can the ADSP-2171BS-133 handle?
The device can handle up to three external interrupts, which can be configured as edge or level sensitive).