Overview
The ADF4001BCP from Analog Devices Inc. is a high-performance clock generator designed to implement clock sources for Phase-Locked Loops (PLLs) that require very low noise and stable reference signals. This device is particularly useful in applications where ultralow phase noise and high stability are critical. It features a low noise digital Phase Frequency Detector (PFD), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. Additionally, it includes a 14-bit reference counter (R counter) that allows for selectable REFIN frequencies at the PFD input.
Key Specifications
| Parameter | Value | Unit | Test Conditions |
|---|---|---|---|
| Power Supply | 2.7 V to 5.5 V | V | AVDD = DVDD |
| Charge Pump Power Supply (VP) | AVDD ≤ VP ≤ 6.0 V | V | |
| Typical Operating Current | 4.5 mA | mA | AVDD = DVDD = 3 V ± 10% |
| Phase Noise Floor | –161 dBc/Hz @ 200 kHz | dBc/Hz | |
| RF Input Frequency (3 V) | 5 MHz to 165 MHz | MHz | |
| RF Input Frequency (5 V) | 10 MHz to 200 MHz | MHz | |
| Package Type | 20-Lead LFCSP | ||
| Operating Temperature | –40°C to +85°C | °C |
Key Features
- 200 MHz bandwidth
- Separate charge pump supply (VP) allowing extended tuning voltage in 5 V systems
- Programmable charge pump currents
- 3-wire serial interface
- Hardware and software power-down mode
- Analog and digital lock detect
- Hardware compatible with ADF4110/ADF4111/ADF4112/ADF4113
- Ultralow phase noise
- MUXOUT allows access to lock detect, scaled RF, or scaled reference frequency
Applications
- Clock generation
- Low frequency PLLs
- Low jitter clock source
- Clock smoothing
- Frequency translation
- SONET, ATM, ADM, DSLAM, SDM
Q & A
- What is the primary function of the ADF4001BCP?
The ADF4001BCP is a clock generator used to implement clock sources for PLLs that require very low noise and stable reference signals.
- What is the power supply range for the ADF4001BCP?
The power supply range is from 2.7 V to 5.5 V.
- What is the typical operating current of the ADF4001BCP?
The typical operating current is 4.5 mA.
- What is the phase noise floor of the ADF4001BCP?
The phase noise floor is –161 dBc/Hz at 200 kHz offset.
- What are the RF input frequency ranges for the ADF4001BCP?
The RF input frequency ranges are 5 MHz to 165 MHz at 3 V and 10 MHz to 200 MHz at 5 V.
- What package types are available for the ADF4001BCP?
The ADF4001BCP is available in a 20-Lead LFCSP package.
- What is the operating temperature range for the ADF4001BCP?
The operating temperature range is –40°C to +85°C.
- Does the ADF4001BCP support power-down modes?
Yes, it supports both hardware and software power-down modes.
- What are some common applications of the ADF4001BCP?
Common applications include clock generation, low frequency PLLs, low jitter clock source, clock smoothing, frequency translation, and use in SONET, ATM, ADM, DSLAM, and SDM systems.
- Is the ADF4001BCP compatible with other Analog Devices PLL synthesizers?
Yes, it is hardware compatible with the ADF4110/ADF4111/ADF4112/ADF4113.
