Overview
The AD9888KSZ-170, produced by Analog Devices Inc., is a complete 8-bit, 170 MSPS (Mega Samples Per Second) monolithic analog interface. This device is optimized for capturing RGB graphics signals from personal computers and workstations. It supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz, thanks to its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz.
The AD9888KSZ-170 is designed to be a fully integrated interface solution for flat panel displays, minimizing design complexity and cost. It includes a 170 MHz triple ADC, an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST signals, and programmable gain, offset, and clamp controls.
Key Specifications
Parameter | Min | Typ | Max | Unit |
---|---|---|---|---|
Resolution | 8 | 8 | 8 | Bits |
Differential Nonlinearity (25°C) | ±0.5 | ±1.25/−1.0 | ±0.6 | LSB |
Integral Nonlinearity (25°C) | ±0.5 | ±2.0 | ±0.75 | LSB |
Analog Input Voltage Range (25°C) | 0.5 | 0.5 | 1.0 | V p-p |
PLL Clock Rate (Max) | - | - | 170 | MHz |
PLL Clock Rate (Min) | 10 | 10 | - | MHz |
PLL Jitter (25°C) | 470 | 700 | 450 | ps p-p |
Digital Input Voltage, High (VIH) | - | 2.5 | - | V |
Digital Input Voltage, Low (VIL) | - | 0.8 | - | V |
Key Features
- 8-bit, 170 MSPS analog interface for capturing RGB graphics signals.
- Full-power analog bandwidth of 500 MHz supporting resolutions up to 1600 × 1200 (UXGA) at 75 Hz.
- Internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST signals.
- Programmable gain, offset, and clamp controls.
- Three-state CMOS outputs powered from 2.5 V to 3.3 V.
- Pixel clock output frequencies range from 10 MHz to 170 MHz.
- PLL clock jitter typically less than 450 ps p-p at 170 MSPS.
- Full sync processing for composite sync and sync-on-green applications.
- Low power consumption: <1 W typical at 170 MSPS in power-down mode.
- Fully programmable via a 2-wire serial port.
Applications
- RGB graphics processing.
- LCD monitors and projectors.
- Plasma display panels.
- Scan converters.
- Microdisplays.
- Digital TV.
Q & A
- What is the resolution and sampling rate of the AD9888KSZ-170?
The AD9888KSZ-170 has an 8-bit resolution and a sampling rate of up to 170 MSPS.
- What is the maximum resolution supported by the AD9888KSZ-170?
The device supports resolutions up to 1600 × 1200 (UXGA) at 75 Hz.
- What is the function of the internal PLL in the AD9888KSZ-170?
The internal PLL generates a pixel clock from the HSYNC and COAST signals.
- What are the power supply requirements for the AD9888KSZ-170?
The device requires a 3.3 V power supply, and the CMOS outputs can be powered from 2.5 V to 3.3 V.
- What is the typical power consumption of the AD9888KSZ-170 at 170 MSPS?
The typical power consumption is less than 1 W at 170 MSPS in power-down mode.
- Can the AD9888KSZ-170 be programmed?
Yes, the device is fully programmable via a 2-wire serial port.
- What is the temperature range for the AD9888KSZ-170?
The device is specified over the 0°C to 70°C temperature range.
- What package type is the AD9888KSZ-170 available in?
The device is available in a 128-lead MQFP (14mm x 20mm) surface-mount, plastic package.
- Does the AD9888KSZ-170 support sync-on-green applications?
Yes, it supports full sync processing for composite sync and sync-on-green applications.
- What is the PLL clock jitter of the AD9888KSZ-170 at 170 MSPS?
The PLL clock jitter is typically less than 450 ps p-p at 170 MSPS.