Overview
The AD9740ACP from Analog Devices Inc. is a 10-bit, high-speed digital-to-analog converter (DAC) specifically optimized for the transmit signal path of communication systems. It is part of the TxDAC family, which offers pin-compatible devices with varying resolutions. The AD9740ACP is known for its excellent integral nonlinearity (INL) and differential nonlinearity (DNL) performance, making it suitable for applications requiring high accuracy and speed.
The device supports update rates up to 210 MSPS and features low power dissipation, making it ideal for portable and low-power applications. It includes a segmented current source architecture and a proprietary switching technique to enhance dynamic performance and reduce spurious components.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Resolution | 10 bits | |||
| Maximum Output Update Rate (fCLOCK) | 210 | MSPS | ||
| Output Settling Time (tST) (to 0.1%) | 11 | ns | ||
| Output Propagation Delay (tPD) | 1 | ns | ||
| Glitch Impulse | 5 | pV-s | ||
| Output Rise Time (10% to 90%) | 2.5 | ns | ||
| Output Fall Time (10% to 90%) | 2.5 | ns | ||
| Output Noise (IOUTFS = 20 mA) | 50 | pA/√Hz | ||
| Power Supply Voltage Range | 2.7 | 3.6 | V | |
| Power Dissipation (typical) | 135 | mW | ||
| Standby Power Dissipation | 15 | mW | ||
Key Features
- Data input supports twos complement or straight binary data coding.
- High-speed, single-ended CMOS clock input supports up to 210 MSPS conversion rate.
- Low power operation: Complete CMOS DAC function operates on 135 mW from a 2.7 V to 3.6 V single supply. Power can be further reduced by lowering the full-scale current output or using the sleep mode.
- On-chip voltage reference: Includes a 1.2 V temperature-compensated band gap voltage reference.
- Industry-standard packages: Available in 28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages.
- Segmented current source architecture combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance.
- Edge-triggered input latches and separate power supply inputs for analog and digital sections.
Applications
- Transmit signal path of communication systems.
- Portable and low-power applications.
- High-speed data acquisition and signal processing systems.
- Wireless communication systems, including 3G and 4G base stations.
- Medical imaging and diagnostic equipment.
Q & A
- What is the resolution of the AD9740ACP?
The AD9740ACP has a resolution of 10 bits.
- What is the maximum output update rate of the AD9740ACP?
The maximum output update rate is up to 210 MSPS.
- How does the AD9740ACP reduce power consumption?
The device can reduce power consumption by lowering the full-scale current output or using the sleep mode, which reduces standby power dissipation to approximately 15 mW.
- What types of data coding does the AD9740ACP support?
The AD9740ACP supports twos complement or straight binary data coding.
- What is the typical power dissipation of the AD9740ACP?
The typical power dissipation is 135 mW from a 2.7 V to 3.6 V single supply.
- What is the purpose of the on-chip voltage reference in the AD9740ACP?
The on-chip 1.2 V temperature-compensated band gap voltage reference provides a stable voltage for the DAC operation.
- What are the available package options for the AD9740ACP?
The device is available in 28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages.
- How does the AD9740ACP enhance dynamic performance?
The device uses a segmented current source architecture combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance.
- What are the typical applications of the AD9740ACP?
The AD9740ACP is typically used in the transmit signal path of communication systems, portable and low-power applications, and high-speed data acquisition and signal processing systems.
- How long does it take for the AD9740ACP to power down and power back up?
The device takes less than 50 ns to power down and approximately 5 μs to power back up.
