Overview
The AD9649BCPZ-80 is a high-performance, monolithic, single-channel 14-bit analog-to-digital converter (ADC) produced by Analog Devices Inc. This ADC operates from a single 1.8 V analog power supply and features a separate digital output driver supply that can accommodate 1.8 V to 3.3 V logic families. It is designed for low power consumption and ease of use, making it suitable for a variety of applications requiring high-speed and high-accuracy data conversion.
Key Specifications
| Parameter | Min | Typ | Max |
|---|---|---|---|
| Resolution | 14 bits | ||
| Sample Rate | 20 MSPS | 80 MSPS | |
| Analog Supply Voltage (AVDD) | 1.8 V | 1.8 V | |
| Digital Output Supply Voltage (DRVDD) | 1.8 V | 3.3 V | |
| Signal-to-Noise Ratio (SNR) at 9.7 MHz input | 74.3 dBFS | ||
| Spurious Free Dynamic Range (SFDR) at 9.7 MHz input | 93 dBc | ||
| Power Consumption at 20 MSPS | 45 mW | ||
| Power Consumption at 80 MSPS | 87 mW | ||
| Input Bandwidth | 700 MHz | ||
| Package Type | 32-Lead LFCSP (5mm x 5mm x 0.85mm) | ||
| Operating Temperature Range | −40°C | +85°C | |
Key Features
- High performance sample-and-hold circuit with excellent performance for input frequencies up to 200 MHz.
- On-chip voltage reference and sample-and-hold circuit.
- Differential input with 700 MHz bandwidth and 2 V p-p differential analog input.
- Low power consumption: 45 mW at 20 MSPS and 87 mW at 80 MSPS.
- Programmable clock and data alignment, and programmable digital test pattern generation.
- Serial port interface (SPI) for various product features and functions, including data output formatting, internal clock divider, power-down, and voltage reference modes.
- Data output in offset binary, gray code, or twos complement format.
- Data output clock (DCO) for proper latch timing with receiving logic.
- Pin compatible with AD9629 12-bit ADC and AD9609 10-bit ADC, enabling easy migration between 10-bit and 14-bit converters.
Applications
- Communications systems, including diversity radio systems and multimode digital receivers (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA).
- Other high-speed data acquisition applications requiring high accuracy and low power consumption.
Q & A
- What is the resolution of the AD9649BCPZ-80 ADC?
The AD9649BCPZ-80 has a resolution of 14 bits.
- What are the available sample rates for the AD9649BCPZ-80?
The sample rates available are 20 MSPS, 40 MSPS, 65 MSPS, and 80 MSPS.
- What is the analog supply voltage for the AD9649BCPZ-80?
The analog supply voltage is 1.8 V.
- What are the supported digital output supply voltages?
The digital output supply voltages range from 1.8 V to 3.3 V.
- What is the signal-to-noise ratio (SNR) at a 9.7 MHz input frequency?
The SNR at a 9.7 MHz input frequency is 74.3 dBFS.
- What is the spurious free dynamic range (SFDR) at a 9.7 MHz input frequency?
The SFDR at a 9.7 MHz input frequency is 93 dBc.
- How much power does the AD9649BCPZ-80 consume at 20 MSPS and 80 MSPS?
The power consumption is 45 mW at 20 MSPS and 87 mW at 80 MSPS.
- What is the input bandwidth of the AD9649BCPZ-80?
The input bandwidth is 700 MHz.
- In what package is the AD9649BCPZ-80 available?
The AD9649BCPZ-80 is available in a 32-Lead LFCSP (5mm x 5mm x 0.85mm).
- What is the operating temperature range of the AD9649BCPZ-80?
The operating temperature range is from −40°C to +85°C.
