Overview
The AD9627BCPZ-80 is a dual, 12-bit analog-to-digital converter (ADC) produced by Analog Devices Inc. This component is designed to support communications applications where low cost, small size, and versatility are crucial. It features a multistage, differential pipelined architecture with integrated output error correction logic and wide bandwidth differential sample-and-hold analog input amplifiers. The AD9627BCPZ-80 operates at a sample rate of 80 MSPS and is suitable for various high-speed data acquisition and communication systems.
Key Specifications
| Parameter | Unit | Min | Typ | Max |
|---|---|---|---|---|
| Resolution | Bits | 12 | 12 | 12 |
| Sample Rate | MSPS | 80 | 80 | 80 |
| Signal-to-Noise Ratio (SNR) | dBFS | - | 70.4 | - |
| Spurious Free Dynamic Range (SFDR) | dBc | - | 85 | - |
| Offset Error | % FSR | -0.2 | -0.6 | -0.3 |
| Gain Error | % FSR | +0.1 | -1.8 | -3.7 |
| Differential Nonlinearity (DNL) | LSB | ±0.4 | ±0.4 | ±0.4 |
| Integral Nonlinearity (INL) | LSB | ±0.9 | ±0.9 | ±0.9 |
| Input Resistance | kΩ | 26 | 26 | 26 |
| Input Capacitance | pF | 5 | 5 | 5 |
| Analog Supply Voltage | V | 1.8 | 1.8 | 1.8 |
| Digital Supply Voltage | V | 1.8 | 1.8 | 3.3 |
| Power Consumption | mW | - | 750 | - |
| Operating Temperature | °C | -40 | - | 85 |
Key Features
- Integrated dual, 12-bit, 80 MSPS ADC with multistage, differential pipelined architecture and integrated output error correction logic.
- Wide bandwidth differential sample-and-hold analog input amplifiers supporting various user-selectable input ranges.
- Internal ADC voltage reference and duty cycle stabilizer to maintain excellent performance.
- Fast overrange detect and signal monitor with serial output for automatic gain control (AGC) functions.
- Support for 1.8 V to 3.3 V CMOS or 1.8 V LVDS output supply.
- Integer 1-to-8 input clock divider and IF sampling frequencies up to 450 MHz.
- Flexible power-down options for significant power savings.
- 3-bit SPI-compatible serial interface for setup and control.
- Available in a 64-lead LFCSP package.
Applications
- Communications systems.
- Diversity radio systems.
- Multimode digital receivers (3G, GSM, EDGE, WCDMA, CDMA2000, WiMAX, TD-SCDMA).
Q & A
- What is the resolution of the AD9627BCPZ-80 ADC?
The AD9627BCPZ-80 has a resolution of 12 bits. - What is the sample rate of the AD9627BCPZ-80?
The sample rate of the AD9627BCPZ-80 is 80 MSPS. - What is the signal-to-noise ratio (SNR) of the AD9627BCPZ-80?
The SNR of the AD9627BCPZ-80 is approximately 70.4 dBFS. - What type of output does the AD9627BCPZ-80 support?
The AD9627BCPZ-80 supports 1.8 V to 3.3 V CMOS or 1.8 V LVDS output. - How is the AD9627BCPZ-80 powered?
The AD9627BCPZ-80 operates from a single 1.8 V analog supply and a separate digital output driver supply that can range from 1.8 V to 3.3 V. - What is the operating temperature range of the AD9627BCPZ-80?
The operating temperature range is from -40°C to +85°C. - What is the power consumption of the AD9627BCPZ-80?
The power consumption is approximately 750 mW at 80 MSPS. - Does the AD9627BCPZ-80 have built-in AGC functions?
Yes, it includes fast overrange detect and signal monitor features to support AGC functions. - How is the AD9627BCPZ-80 programmed?
The AD9627BCPZ-80 is programmed using a 3-bit SPI-compatible serial interface. - In what package is the AD9627BCPZ-80 available?
The AD9627BCPZ-80 is available in a 64-lead LFCSP package.
