Overview
The AD9613BCPZRL7-250, produced by Analog Devices Inc., is a dual 12-bit analog-to-digital converter (ADC) designed for high-speed, low-power applications. This device is particularly suited for communications systems where low cost, small size, wide bandwidth, and versatility are critical. The AD9613 features a multistage, differential pipelined architecture with integrated output error correction logic, ensuring high performance and accuracy. It operates with sampling speeds of up to 250 MSPS and supports input frequencies up to 400 MHz, making it ideal for various communication and signal processing applications.
Key Specifications
| Parameter | Value |
|---|---|
| Resolution | 12-bit |
| Sampling Rate | Up to 250 MSPS |
| Input Frequency Range | Up to 400 MHz |
| Signal-to-Noise Ratio (SNR) | 69.6 dBFS at 185 MHz fIN and 250 MSPS |
| Spurious Free Dynamic Range (SFDR) | 86 dBc at 185 MHz fIN and 250 MSPS |
| Input Noise | −149.9 dBFS/Hz at 185 MHz, −1 dBFS AIN and 250 MSPS |
| Total Power Consumption | 770 mW at 250 MSPS |
| Supply Voltage | 1.8 V |
| Output Format | LVDS (ANSI-644 levels), interleaved or channel multiplexed |
| Package | 64-Lead Lead Frame Chip Scale Package (LFCSP) |
| Operating Temperature Range | −40°C to +85°C |
Key Features
- Integrated dual 12-bit ADCs with sampling speeds up to 250 MSPS
- Proprietary differential input maintains excellent SNR performance for input frequencies up to 400 MHz
- Internal ADC voltage reference and duty cycle stabilizer for consistent performance
- Flexible analog input range (1.4 V p-p to 2.0 V p-p, 1.75 V p-p nominal)
- LVDS (ANSI-644 levels) outputs, formatted as either interleaved or channel multiplexed
- Integer 1-to-8 input clock divider (625 MHz maximum input)
- 3-pin, 1.8V SPI port for register programming and register readback
- Energy-saving power-down modes
- Synchronization capability for multiple devices
Applications
- Communications systems
- Diversity radio systems
- Multimode digital receivers (3G, TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE)
- I/Q demodulation systems
- Smart antenna systems
- General-purpose software radios
- Ultrasound equipment
- Broadband data applications
Q & A
- What is the maximum sampling rate of the AD9613?
The AD9613 can sample at rates up to 250 MSPS.
- What is the input frequency range supported by the AD9613?
The AD9613 supports input frequencies up to 400 MHz.
- What is the signal-to-noise ratio (SNR) of the AD9613 at 185 MHz input frequency and 250 MSPS sampling rate?
The SNR is 69.6 dBFS at 185 MHz fIN and 250 MSPS.
- What is the total power consumption of the AD9613 at 250 MSPS?
The total power consumption is 770 mW at 250 MSPS.
- What type of output format does the AD9613 support?
The AD9613 supports LVDS (ANSI-644 levels) outputs, formatted as either interleaved or channel multiplexed.
- How is the AD9613 programmed and controlled?
Programming and control are accomplished using a 3-pin, SPI-compatible serial interface.
- What is the operating temperature range of the AD9613?
The operating temperature range is −40°C to +85°C.
- Does the AD9613 support synchronization of multiple devices?
- What is the package type of the AD9613?
The AD9613 is available in a 64-Lead Lead Frame Chip Scale Package (LFCSP).
- What are some of the key applications of the AD9613?
The AD9613 is used in communications systems, diversity radio systems, multimode digital receivers, I/Q demodulation systems, smart antenna systems, general-purpose software radios, ultrasound equipment, and broadband data applications.
