Overview
The AD9515BCPZ is a two-output clock distribution IC designed by Analog Devices Inc. to emphasize low jitter and phase noise, thereby maximizing the performance of data converters. This IC features two independent clock outputs, with one output configured as LVPECL and the other output configurable to either LVDS or CMOS levels. The LVPECL output operates up to 1.6 GHz, while the other output operates up to 800 MHz in LVDS mode and up to 250 MHz in CMOS mode. Each output includes a programmable divider that can be set to divide by integers ranging from 1 to 32, and a divider phase select function for coarse timing adjustments.
Key Specifications
Parameter | Value |
---|---|
Input Frequency | Up to 1.6 GHz (VS = 3.3V ± 5%, TA = 25°C) |
LVPECL Output Frequency | Up to 1.6 GHz (VS = 3.3V ± 5%, TA = 25°C) |
LVDS Output Frequency | Up to 800 MHz (VS = 3.3V ± 5%, TA = 25°C) |
CMOS Output Frequency | Up to 250 MHz (VS = 3.3V ± 5%, TA = 25°C) |
Additive Output Jitter (LVPECL) | 225 fs rms typical |
Additive Output Jitter (LVDS) | 300 fs rms typical |
Additive Output Jitter (CMOS) | 290 fs rms typical |
Supply Voltage | 3.135 V to 3.465 V |
Operating Temperature | -40°C to +85°C |
Package Style | 32-lead lead frame chip scale (LFCSP-VQ) |
Number of Outputs | 2 |
Key Features
- Low jitter and phase noise to maximize data converter performance
- Two independent clock outputs: one LVPECL and one configurable to LVDS or CMOS
- Programmable dividers for each output, divisible by integers from 1 to 32
- Divider phase select function for coarse timing adjustments
- 4-level logic pins for configuration
- Operating temperature range of -40°C to +85°C
- Surface mount package (32-VFQFN Exposed Pad, CSP)
Applications
- Low jitter, low phase noise clock distribution
- Clocking high-speed ADCs, DACs, DDSs, DDCs, DUCs, and MxFEs
- High-performance wireless transceivers
- High-performance instrumentation
- Broadband infrastructure
- Automated Test Equipment (ATE)
Q & A
- What is the maximum input frequency of the AD9515BCPZ?
The maximum input frequency is up to 1.6 GHz at VS = 3.3V ± 5%, TA = 25°C.
- What are the output frequency ranges for LVPECL, LVDS, and CMOS outputs?
The LVPECL output operates up to 1.6 GHz, the LVDS output up to 800 MHz, and the CMOS output up to 250 MHz.
- What is the typical additive output jitter for each output type?
The typical additive output jitter is 225 fs rms for LVPECL, 300 fs rms for LVDS, and 290 fs rms for CMOS.
- What is the supply voltage range for the AD9515BCPZ?
The supply voltage range is from 3.135 V to 3.465 V.
- What is the operating temperature range of the AD9515BCPZ?
The operating temperature range is from -40°C to +85°C.
- What package style is the AD9515BCPZ available in?
The AD9515BCPZ is available in a 32-lead lead frame chip scale (LFCSP-VQ) package.
- How many outputs does the AD9515BCPZ have?
The AD9515BCPZ has two independent clock outputs.
- What types of applications is the AD9515BCPZ suited for?
The AD9515BCPZ is suited for applications requiring low jitter and phase noise, such as high-speed ADCs, DACs, wireless transceivers, and broadband infrastructure.
- Can the phase of one clock output be adjusted relative to the other?
- Does the AD9515BCPZ require an external controller for operation?
No, the AD9515BCPZ does not require an external controller for operation or setup.