Overview
The AD585JP-REEL, produced by Analog Devices Inc., is a high-speed, precision sample-and-hold amplifier. This monolithic sample-and-hold circuit integrates a high-performance operational amplifier, an ultralow leakage analog switch, and a FET input integrating amplifier. It is designed for high-speed data acquisition systems, particularly those requiring fast acquisition times, low sample-to-hold offset, and minimal droop. The AD585JP-REEL is suitable for use with 10- and 12-bit successive-approximation A/D converters and is available in various performance grades and packaging options.
Key Specifications
Parameter | Min | Typ | Max | Units |
---|---|---|---|---|
Acquisition Time (10 V Step to 0.01%) | 3 | 3 | 3 | µs |
Acquisition Time (20 V Step to 0.01%) | 5 | 5 | 5 | µs |
Aperture Time (20 V p-p Input, HOLD 0 V) | 35 | 35 | 35 | ns |
Aperture Jitter (20 V p-p Input, HOLD 0 V) | 0.5 | 0.5 | 0.5 | ns |
Settling Time (20 V p-p Input, HOLD 0 V, to 0.01%) | 0.5 | 0.5 | 0.5 | µs |
Droop Rate | 1 | 1 | 1 | mV/ms |
Charge Transfer | 0.3 | 0.3 | 0.3 | pC |
Sample-to-Hold Offset | - | - | 3 | mV |
Key Features
- Fast Acquisition Time: The AD585JP-REEL can acquire a signal to ±0.01% in 3 µs for a 10 V step and 5 µs for a 20 V step.
- Low Aperture Jitter: Exhibits an aperture jitter of 0.5 ns, enabling precise sampling of high-frequency signals.
- Low Droop Rate: Features a droop rate of 1 mV/ms, ensuring high accuracy over time.
- Internal Holding Capacitor: Includes an internal 100 pF hold capacitor, with the option to add an external capacitor for reduced droop rates.
- Flexible Gain Options: Can be used with user-defined feedback networks to provide any desired gain in the sample mode.
- Compatibility with Logic Families: The differential HOLD signal is compatible with all logic families, and an on-chip TTL reference level is provided for TTL compatibility.
- MIL-STD-883 Compliant Versions: Available in versions compliant with MIL-STD-883 for military applications.
Applications
The AD585JP-REEL is ideal for high-speed data acquisition systems, particularly those requiring 10- and 12-bit precision. It is recommended for use with successive-approximation A/D converters such as the AD573, AD574A, AD674A, AD7572, and AD7672. Other applications include:
- High-speed data acquisition systems.
- Successive-approximation A/D converter systems.
- Military and industrial applications requiring high precision and reliability.
Q & A
- What is the acquisition time of the AD585JP-REEL for a 10 V step?
The acquisition time for a 10 V step is 3 µs to ±0.01%. - What is the aperture jitter of the AD585JP-REEL?
The aperture jitter is 0.5 ns. - What is the droop rate of the AD585JP-REEL?
The droop rate is 1 mV/ms. - Can the AD585JP-REEL be used with external capacitors to reduce droop rates?
Yes, an external capacitor can be added to reduce the droop rate when long hold times and high accuracy are required. - Is the AD585JP-REEL compatible with all logic families?
Yes, the differential HOLD signal is compatible with all logic families, and an on-chip TTL reference level is provided for TTL compatibility. - What are the available packaging options for the AD585JP-REEL?
The AD585JP-REEL is available in 20-pin PLCC, 14-pin cerdip, and 20-pin LCC packages. - Is the AD585JP-REEL compliant with MIL-STD-883?
Yes, versions of the AD585JP-REEL are available that are compliant with MIL-STD-883. - What is the sample-to-hold offset of the AD585JP-REEL?
The sample-to-hold offset is less than 3 mV. - Can the AD585JP-REEL be used in high-temperature environments?
Yes, it is specified for various temperature ranges including commercial (0°C to +70°C), industrial (–25°C to +85°C), and military (–55°C to +125°C) environments. - What is the output impedance of the AD585JP-REEL in the hold mode?
The output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving dynamic loads.