Overview
The TPS3808G30DRVR, produced by Texas Instruments, is a microprocessor supervisory circuit designed to monitor system voltages and assert a RESET signal when the voltage drops below a preset threshold or when the manual reset (MR) pin is driven low. This device is part of the TPS3808 family, which offers adjustable delay times and high threshold accuracy, making it suitable for a wide range of applications, including DSP, microcontroller, and battery-powered systems.
The TPS3808G30DRVR is specifically configured for a nominal supply voltage of 3 V, with a threshold voltage of 2.79 V. It features a very low quiescent current of 2.4 μA, high threshold accuracy, and an adjustable reset delay time. The device is available in SOT-23 and 2-mm × 2-mm WSON packages and operates over a temperature range of –40°C to 125°C.
Key Specifications
Parameter | Test Conditions | Min | Typ | Max | Unit |
---|---|---|---|---|---|
VDD Input Supply Range | –40°C < TJ < 125°C | 1.7 | 6.5 | V | |
IDD Supply Current | VDD = 3.3 V, RESET not asserted, MR, RESET, CT open | 2.4 | 2.4 | 5 | μA |
VOL Low-level Output Voltage | 1.8 V ≤ VDD ≤ 6.5 V, IOL = 1 mA | 0.4 | V | ||
VIT Negative-going Input Threshold Accuracy | VIT ≤ 3.3 V, –40°C < TJ < 85°C | –1.5% | ±0.5% | 1.5% | % |
VHYS Hysteresis on VIT Pin | Fixed versions | 1% | 2.5% | % | |
R_MR MR Internal Pullup Resistance | 70 | 90 | kΩ | ||
ISENSE Input Current at SENSE Pin | VSENSE = VIT | –25 | 25 | nA | |
td RESET Delay Time | CT = Open | 12 | 20 | 28 | ms |
td RESET Delay Time | CT = VDD | 180 | 300 | 420 | ms |
td RESET Delay Time | CT = 100 pF | 0.75 | 1.25 | 1.75 | s |
Key Features
- Power-on Reset Generator: Adjustable delay time from 1.25 ms to 10 s.
- Low Quiescent Current: Typical 2.4 μA, making it suitable for battery-powered applications.
- High Threshold Accuracy: 0.5% typical for VIT ≤ 3.3 V.
- Fixed and Adjustable Threshold Voltages: Available for standard voltage rails from 0.9 V to 5 V and adjustable down to 0.4 V.
- Manual Reset (MR) Input: Allows for manual assertion of the RESET signal.
- Open-Drain RESET Output: Can be pulled up to a voltage higher than VDD (up to 6.5 V).
- Temperature Range: Fully specified over –40°C to 125°C.
- Package Options: Available in SOT-23 and 2-mm × 2-mm WSON packages.
Applications
- DSP and Microcontroller Applications: Ideal for monitoring and resetting microprocessors in various digital signal processing and microcontroller-based systems.
- Notebook and Desktop Computers: Used to ensure proper system reset and power management.
- PDAs and Hand-Held Products: Suitable for battery-powered devices requiring low quiescent current.
- Portable and Battery-Powered Products: Optimized for low power consumption and adjustable reset times.
- FPGA and ASIC Applications: Can be used to monitor and reset complex digital circuits.
Q & A
- What is the typical quiescent current of the TPS3808G30DRVR?
The typical quiescent current is 2.4 μA.
- What is the range of adjustable delay times for the TPS3808G30DRVR?
The delay time can be adjusted from 1.25 ms to 10 s.
- What are the package options available for the TPS3808G30DRVR?
The device is available in SOT-23 and 2-mm × 2-mm WSON packages.
- What is the temperature range for the TPS3808G30DRVR?
The device is fully specified over a temperature range of –40°C to 125°C.
- How can the reset delay time be set for the TPS3808G30DRVR?
The reset delay time can be set by connecting the CT pin to VDD, leaving it open, or using an external capacitor.
- What is the threshold voltage for the TPS3808G30DRVR?
The threshold voltage for the TPS3808G30DRVR is 2.79 V.
- Can the TPS3808G30DRVR be used in battery-powered applications?
Yes, it is well-suited for battery-powered applications due to its low quiescent current.
- How does the manual reset (MR) input work?
The MR input allows for manual assertion of the RESET signal by driving the MR pin low.
- What is the purpose of the open-drain RESET output?
The open-drain RESET output can be pulled up to a voltage higher than VDD (up to 6.5 V) using an external pullup resistor.
- How can the sensitivity to transients on the SENSE pin be reduced?
A 1-nF to 10-nF bypass capacitor on the SENSE input can reduce sensitivity to transients and layout parasitics.