Overview
The TMS320F28035PAGQ is a 32-bit microcontroller from Texas Instruments, part of the C2000™ family. It is optimized for processing, sensing, and actuation to enhance closed-loop performance in real-time control applications. This microcontroller is particularly suited for industrial motor drives, solar inverters, digital power systems, electrical vehicles, motor control, and sensing and signal processing. The F2803x family, to which this device belongs, combines the power of the C28x core with a Control Law Accelerator (CLA) and highly integrated control peripherals, all within low pin-count devices. This family is code-compatible with previous C28x-based code and offers a high level of analog integration.
Key Specifications
| Specification | Details |
|---|---|
| CPU | High-efficiency 32-bit CPU (TMS320C28x), 60MHz (16.67ns cycle time) |
| MAC Operations | 16 × 16 and 32 × 32 MAC operations, 16 × 16 dual MAC |
| Bus Architecture | Harvard bus architecture |
| Interrupt Response | Fast interrupt response and processing |
| Memory Model | Unified memory programming model |
| CLA | Programmable Control Law Accelerator (CLA), 32-bit floating-point math accelerator |
| Endianness | Little endian |
| JTAG Support | JTAG boundary scan support, IEEE Standard 1149.1-1990 |
| Power Supply | Single 3.3V supply, no power sequencing requirement, integrated power-on reset and brown-out reset |
| Clocking | Two internal zero-pin oscillators, on-chip crystal oscillator, external clock input, watchdog timer module, missing clock detection circuitry |
| GPIO | Up to 45 individually programmable, multiplexed GPIO pins with input filtering |
| Timers | Three 32-bit CPU timers |
| Package | 80-Pin PN Low-Profile Quad Flatpack (LQFP), 12.0mm × 12.0mm |
| Temperature Range | –40°C to 125°C (AEC Q100 qualification for automotive applications) |
Key Features
- High-Performance CPU: High-efficiency 32-bit CPU (TMS320C28x) with 60MHz (16.67ns cycle time), 16 × 16 and 32 × 32 MAC operations, and 16 × 16 dual MAC.
- Control Law Accelerator (CLA): Programmable CLA with a 32-bit floating-point math accelerator that executes code independently of the main CPU.
- Harvard Bus Architecture: Optimized for fast data transfer and processing.
- Fast Interrupt Response: Fast interrupt response and processing capabilities.
- Unified Memory Model: Unified memory programming model for efficient code execution.
- Analog Integration: High level of analog integration including ADC, analog comparators with internal 10-bit references, and optimized ADC interface for low overhead and latency.
- Clocking and Power Management: Single 3.3V supply, no power sequencing requirement, integrated power-on reset and brown-out reset, and low power consumption.
- GPIO and Peripherals: Up to 45 individually programmable, multiplexed GPIO pins with input filtering, and a Peripheral Interrupt Expansion (PIE) block supporting all peripheral interrupts.
Applications
- Industrial Motor Drives: Optimized for real-time control in industrial motor drive applications.
- Solar Inverters and Digital Power: Suitable for solar inverter and digital power systems requiring precise control and high performance.
- Electrical Vehicles and Transportation: Used in electrical vehicle and transportation systems for powertrain control and other critical functions.
- Motor Control: Ideal for various motor control applications due to its advanced PWM and control peripherals.
- Sensing and Signal Processing: Effective in sensing and signal processing applications requiring real-time data processing.
- Factory Automation: Used in factory automation for control and monitoring of industrial processes.
- Grid Infrastructure: Applied in grid infrastructure for power delivery and management systems.
- Medical, Healthcare, and Fitness: Used in medical and healthcare devices requiring precise control and real-time processing.
- Telecom Infrastructure: Suitable for telecom infrastructure applications needing high-performance processing.
- Test and Measurement: Utilized in test and measurement equipment for precise data acquisition and processing.
Q & A
- What is the CPU speed of the TMS320F28035PAGQ?
The CPU speed is 60MHz with a cycle time of 16.67ns.
- What is the Control Law Accelerator (CLA) in the TMS320F28035PAGQ?
The CLA is a programmable accelerator that includes a 32-bit floating-point math accelerator and executes code independently of the main CPU.
- What is the bus architecture of the TMS320F28035PAGQ?
The bus architecture is Harvard, optimized for fast data transfer and processing.
- What is the power supply requirement for the TMS320F28035PAGQ?
The device requires a single 3.3V supply with no power sequencing requirement and includes integrated power-on reset and brown-out reset.
- How many GPIO pins does the TMS320F28035PAGQ have?
The device has up to 45 individually programmable, multiplexed GPIO pins with input filtering.
- What are the key applications of the TMS320F28035PAGQ?
The key applications include industrial motor drives, solar inverters, digital power systems, electrical vehicles, motor control, and sensing and signal processing.
- Is the TMS320F28035PAGQ suitable for automotive applications?
- What is the package type of the TMS320F28035PAGQ?
The device is packaged in an 80-Pin PN Low-Profile Quad Flatpack (LQFP) with a body size of 12.0mm × 12.0mm.
- Does the TMS320F28035PAGQ support JTAG boundary scan?
- What is the endianness of the TMS320F28035PAGQ?
The endianness is little endian.
