Overview
The TMS320C6748EZCE3 is a fixed- and floating-point Digital Signal Processor (DSP) from Texas Instruments, based on the C674x DSP core. This low-power applications processor is designed to provide significantly lower power consumption compared to other members of the TMS320C6000 platform. It is ideal for original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to develop devices with robust operating systems, rich user interfaces, and high processor performance. The device features a 2-level cache-based architecture, enhancing its performance and efficiency.
Key Specifications
Specification | Details |
---|---|
Processor Frequency | 375 MHz (1.2V) or 456 MHz (1.3V) |
Instruction Set | Superset of C67x+ and C64x+ ISAs |
Performance | Up to 3648 MIPS and 2746 MFLOPS |
Cache Memory | 32KB L1P Program RAM/Cache, 32KB L1D Data RAM/Cache, 256KB L2 Unified Mapped RAM/Cache |
General-Purpose Registers | 64 General-Purpose Registers (32-Bit) |
DMA Controller | Enhanced Direct Memory Access Controller 3 (EDMA3) with 64 Independent DMA Channels, 16 Quick DMA Channels |
External Memory Interfaces | EMIFA, NOR, NAND, 16-Bit SDRAM, DDR2/Mobile DDR Memory Controller |
I/O Voltage | 1.8-V or 3.3-V LVCMOS I/Os (Except for USB and DDR2 Interfaces) |
Packages | 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) with 0.65-mm or 0.80-mm ball pitch |
Key Features
- C674x Fixed- and Floating-Point VLIW DSP Core with load-store architecture and nonaligned support
- Byte-Addressable (8-, 16-, 32-, and 64-Bit Data) with 8-Bit Overflow Protection, Bit-Field Extract, Set, Clear, Normalization, Saturation, Bit-Counting
- Compact 16-Bit Instructions and Instruction Packing to reduce code size
- All Instructions Conditional with Hardware Support for Modulo Loop Operation and Protected Mode Operation
- Enhanced Direct Memory Access Controller 3 (EDMA3) with 2 Channel Controllers, 3 Transfer Controllers, 64 Independent DMA Channels, and 16 Quick DMA Channels
- Multiple Serial Interfaces: UART, SPI, I2C, McASP, McBSP
- 10/100 Mbps Ethernet MAC (EMAC) with IEEE 802.3 compliance
- USB 2.0 High-, Full-, and Low-Speed Host and USB 1.1 Full-Speed OHCI (as host)
- LCD Controller, SATA Controller, and Video Port Interface (VPIF)
- Programmable Real-Time Unit (PRU) Subsystem with 2 Programmable PRU Cores
Applications
- Currency Inspection
- Biometric Identification
- Machine Vision (Low-End)
- Other applications requiring high-performance DSP capabilities with low power consumption
Q & A
- What is the TMS320C6748EZCE3 processor frequency?
The processor frequency is 375 MHz (1.2V) or 456 MHz (1.3V).
- What is the cache memory architecture of the TMS320C6748EZCE3?
The device features a 2-level cache memory architecture with 32KB L1P Program RAM/Cache, 32KB L1D Data RAM/Cache, and 256KB L2 Unified Mapped RAM/Cache.
- What are the key features of the EDMA3 controller in the TMS320C6748EZCE3?
The EDMA3 controller includes 2 Channel Controllers, 3 Transfer Controllers, 64 Independent DMA Channels, and 16 Quick DMA Channels.
- What types of external memory interfaces does the TMS320C6748EZCE3 support?
The device supports EMIFA, NOR, NAND, 16-Bit SDRAM, and DDR2/Mobile DDR Memory Controller.
- What are the I/O voltage options for the TMS320C6748EZCE3?
The I/O voltage options are 1.8-V or 3.3-V LVCMOS I/Os (except for USB and DDR2 interfaces).
- What are the package options for the TMS320C6748EZCE3?
The device is available in 361-Ball Pb-Free Plastic Ball Grid Array (PBGA) packages with 0.65-mm or 0.80-mm ball pitch.
- What are some of the serial interfaces supported by the TMS320C6748EZCE3?
The device supports UART, SPI, I2C, McASP, and McBSP serial interfaces.
- Does the TMS320C6748EZCE3 support Ethernet connectivity?
Yes, it supports 10/100 Mbps Ethernet MAC (EMAC) with IEEE 802.3 compliance.
- What is the purpose of the PRU subsystem in the TMS320C6748EZCE3?
The PRU subsystem includes 2 Programmable PRU Cores for real-time processing tasks.
- What are some typical applications of the TMS320C6748EZCE3?
Typical applications include currency inspection, biometric identification, and machine vision (low-end).