Overview
The TMS320C6657CZH8 is a high-performance, dual-core digital signal processor (DSP) from Texas Instruments, based on the KeyStone multicore architecture. This device features two TMS320C66x DSP core subsystems, each capable of operating at speeds of up to 1.25 GHz. It is designed to provide a power-efficient and user-friendly platform for a wide range of applications, including avionics, defense, communications, and machine vision. The C6657 is fully backward compatible with the existing C6000 family of fixed- and floating-point DSPs, ensuring software portability and shortened development cycles.
Key Specifications
Specification | Details |
---|---|
Manufacturer | Texas Instruments |
Part Number | TMS320C6657CZH8 |
Package Type | FCBGA (CZH) with 625 pins |
Operating Temperature Range | 0°C to 85°C (Commercial), –40°C to 100°C (Extended) |
CPU Cores | Two TMS320C66x DSP Core Subsystems |
Core Speed | Up to 1.25 GHz |
Fixed-Point Performance | 40 GMAC per core @ 1.25 GHz |
Floating-Point Performance | 20 GFLOP per core @ 1.25 GHz |
Memory | 1024KB Multicore Shared Memory (MSM SRAM), 32KB L1 program and data cache, 32-bit DDR3 interface |
Interfaces | PCIe Gen2, RapidIO 2.1, Gigabit Ethernet, HyperLink, UART, McBSP, I2C, SPI, Universal Parallel Port |
Hardware Accelerators | Two Viterbi Coprocessors, One Turbo Coprocessor Decoder |
Key Features
- Dual-Core DSP: Two TMS320C66x DSP core subsystems, each with up to 1.25 GHz operating frequency.
- High Performance: 40 GMAC per core for fixed-point operations and 20 GFLOP per core for floating-point operations at 1.25 GHz.
- Memory and Cache: 1024KB Multicore Shared Memory (MSM SRAM), 32KB L1 program and data cache, and a 32-bit DDR3 interface.
- Interfaces and Peripherals: PCIe Gen2, RapidIO 2.1, Gigabit Ethernet, HyperLink, UART, McBSP, I2C, SPI, and Universal Parallel Port.
- Hardware Accelerators: Two Viterbi Coprocessors and one Turbo Coprocessor Decoder.
- Multicore Navigator and TeraNet: Efficient data management and nonblocking switch fabric for fast internal data movement.
- Backward Compatibility: Fully compatible with the existing C6000 family of fixed- and floating-point DSPs.
Applications
- Avionics & Defense: High-performance signal processing for military and aerospace applications.
- Communications: Baseband processing, wireless infrastructure, and other communication systems.
- Machine Vision: Image and video processing for industrial and surveillance applications.
- Other Applications: Medical imaging, radar, and various industrial automation tasks.
Q & A
- What is the maximum operating frequency of the TMS320C6657CZH8?
The maximum operating frequency is up to 1.25 GHz.
- How many DSP cores does the TMS320C6657CZH8 have?
The device has two TMS320C66x DSP core subsystems.
- What type of memory does the TMS320C6657CZH8 support?
The device supports 1024KB Multicore Shared Memory (MSM SRAM) and a 32-bit DDR3 interface.
- What are the key interfaces supported by the TMS320C6657CZH8?
The device supports PCIe Gen2, RapidIO 2.1, Gigabit Ethernet, HyperLink, UART, McBSP, I2C, SPI, and Universal Parallel Port.
- Does the TMS320C6657CZH8 have hardware accelerators?
Yes, it includes two Viterbi Coprocessors and one Turbo Coprocessor Decoder.
- Is the TMS320C6657CZH8 backward compatible with other DSPs?
Yes, it is fully backward compatible with the existing C6000 family of fixed- and floating-point DSPs.
- What is the operating temperature range of the TMS320C6657CZH8?
The commercial temperature range is 0°C to 85°C, and the extended temperature range is –40°C to 100°C.
- What is the package type and pin count of the TMS320C6657CZH8?
The package type is FCBGA (CZH) with 625 pins.
- What development tools are available for the TMS320C6657CZH8?
The device has an enhanced C compiler, an assembly optimizer, and a Windows debugger interface, among other tools.
- What is the purpose of the Multicore Navigator in the TMS320C6657CZH8?
The Multicore Navigator is an innovative packet-based manager that controls 8192 queues, providing hardware-accelerated dispatch to direct tasks to the appropriate available hardware.