Overview
The TMS320DM6441, also known as the DM6441, is a high-performance Digital Media System-on-Chip (DMSoC) developed by Texas Instruments. This device leverages TI’s DaVinci™ technology to meet the processing needs of next-generation embedded devices, particularly in networked media encode and decode applications. The DM6441 integrates a dual-core architecture, combining a TMS320C64x+ DSP core and an ARM926EJ-S core, providing the benefits of both DSP and Reduced Instruction Set Computer (RISC) technologies.
This SoC is designed to support robust operating systems, rich user interfaces, high processing performance, and long battery life, making it an ideal solution for OEMs and ODMs to quickly bring to market advanced embedded devices.
Key Specifications
| Feature | Specification |
|---|---|
| DSP Clock Rate | 405 MHz (max) at 1.05 V, 513 MHz (max) at 1.2 V |
| ARM926EJ-S Clock Rate | 202.5 MHz (max) at 1.05 V, 256 MHz (max) at 1.2 V |
| L1P Program RAM/Cache | 32K-Byte (Direct Mapped) |
| L1D Data RAM/Cache | 80K-Byte (2-Way Set-Associative) |
| L2 Unified Mapped RAM/Cache | 64K-Byte |
| DDR2 Memory Controller | 32-Bit, 256M-Byte Address Space (1.8-V I/O) |
| Asynchronous EMIF (EMIFA) | 16-Bit-Wide, 128M-Byte Address Reach |
| Package Type | 361-Pin Pb-Free BGA Package (ZWT Suffix), 0.8-mm Ball Pitch |
| Process Technology | 0.09-µm/6-Level Cu Metal Process (CMOS) |
| Voltage | 1.05 V, 1.2 V (Core), 1.8 V, 3.3 V (I/O) |
Key Features
- High-Performance Digital Media SoC with C64x+ L1/L2 Memory Architecture
- Dual-core architecture: TMS320C64x+ DSP core and ARM926EJ-S core
- Video Processing Subsystem (VPSS) with Video Processing Front-End (VPFE) and Back-End (VPBE)
- Video Imaging Co-Processor (VICP) and Histogram Module
- Auto-Exposure, Auto-White Balance, and Auto-Focus Module
- Resize Engine for image resizing from 1/4x to 4x
- 10/100 Mb/s Ethernet MAC (EMAC) with MDIO module
- Inter-Integrated Circuit (I2C) bus interface and SPI with two chip-selects
- Audio Serial Port (ASP) and USB 2.0 with integrated PHY
- Enhanced Direct-Memory-Access (EDMA3) controller with 64 independent channels
- General-Purpose Input/Output Port with up to 71 pins
- Pulse Width Modulator (PWM) outputs and timers
Applications
- Digital Media Devices
- Networked Media Encode/Decode
- Video Imaging
- Portable Media Players
- Embedded Devices requiring high processing performance and long battery life
Q & A
- What is the TMS320DM6441? The TMS320DM6441 is a Digital Media System-on-Chip (DMSoC) developed by Texas Instruments.
- What are the key cores in the TMS320DM6441? The device features a TMS320C64x+ DSP core and an ARM926EJ-S core.
- What are the clock rates of the DSP and ARM cores? The DSP core operates at up to 513 MHz, and the ARM core operates at up to 256 MHz.
- What is the Video Processing Subsystem (VPSS) in the TMS320DM6441? The VPSS includes the Video Processing Front-End (VPFE) and Back-End (VPBE) with imaging coprocessor (VICP).
- What memory interfaces does the TMS320DM6441 support? It supports DDR2, asynchronous EMIF, NOR, NAND, Compact Flash, MMC/SD, and others.
- What are the key peripherals of the TMS320DM6441? Key peripherals include Ethernet MAC, I2C, SPI, ASP, USB 2.0, and PWM outputs.
- What is the package type of the TMS320DM6441? It is packaged in a 361-pin Pb-Free BGA package.
- What process technology is used in the TMS320DM6441? It uses a 0.09-µm/6-Level Cu Metal Process (CMOS).
- What are the typical applications of the TMS320DM6441? Typical applications include digital media devices, networked media encode/decode, video imaging, and portable media players.
- Does the TMS320DM6441 support power-saving modes? Yes, it supports individual power-saving modes for ARM/DSP cores.
- What is the EDMA3 controller in the TMS320DM6441? The EDMA3 controller has 64 independent channels for enhanced direct-memory-access.
