Overview
The SN65LVDT100DGKR is a high-speed differential receiver and driver designed by Texas Instruments. It functions as a repeater, accepting low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeating them as either LVDS or PECL output signals. This device is optimized for low radiated emissions and minimal added jitter, making it suitable for high-speed data transmission applications.
Key Specifications
| Parameter | Value |
|---|---|
| Package | VSSOP (DGK) with 8 pins |
| Operating Temperature Range | -40°C to 85°C |
| Signaling Rate | ≥ 2 Gbps |
| Total Jitter | < 65 ps |
| Part-to-Part Skew | < 100 ps |
| Receiver Input Threshold Hysteresis | 25 mV |
| Input Voltage Range | 0-V to 4-V |
| Supply Voltage | 3.3 V |
| Differential Line Termination Resistor | 110 Ω |
Key Features
- Designed for signaling rates ≥ 2 Gbps
- Total jitter < 65 ps
- Low-power alternative for the MC100EP16
- Low 100-ps (maximum) part-to-part skew
- 25 mV of receiver input threshold hysteresis
- Inputs electrically compatible with LVPECL, CML, and LVDS signal levels
- 3.3-V supply operation
- Integrates 110-Ω differential line termination resistor for reduced board space and fewer components
- Offered in SOIC and MSOP packages
Applications
The SN65LVDT100DGKR is suitable for various high-speed data transmission applications, including:
- High-speed data communication systems
- Telecommunication equipment
- Data centers and server infrastructure
- High-performance computing systems
- Industrial automation and control systems
Q & A
- What is the maximum signaling rate of the SN65LVDT100DGKR?
The SN65LVDT100DGKR supports signaling rates up to 2 Gbps.
- What types of input signals does the SN65LVDT100DGKR accept?
The device accepts LVDS, PECL, and CML input signals.
- What is the operating temperature range of the SN65LVDT100DGKR?
The operating temperature range is -40°C to 85°C.
- Does the SN65LVDT100DGKR include a differential line termination resistor?
Yes, it includes a 110-Ω differential line termination resistor.
- What is the supply voltage for the SN65LVDT100DGKR?
The supply voltage is 3.3 V.
- What is the maximum total jitter of the SN65LVDT100DGKR?
The total jitter is less than 65 ps.
- What is the part-to-part skew of the SN65LVDT100DGKR?
The part-to-part skew is less than 100 ps.
- What is the input voltage range for the SN65LVDT100DGKR?
The input voltage range is 0-V to 4-V.
- Is the SN65LVDT100DGKR compatible with LVPECL, CML, and LVDS signal levels?
Yes, it is compatible with LVPECL, CML, and LVDS signal levels.
- What packages are available for the SN65LVDT100DGKR?
The device is offered in SOIC, MSOP, and VSSOP (DGK) packages.
