Overview
The SN65LVDS9638DR is a quad-channel Low-Voltage Differential Signaling (LVDS) line driver produced by Texas Instruments. This device is designed to operate from a single 3.3-V supply and is characterized for operation over a temperature range of –40°C to 85°C. It implements the electrical characteristics of LVDS, which reduces power consumption, increases switching speeds, and allows operation with a lower supply voltage compared to traditional 5-V differential standards like TIA/EIA-422B.
The device accepts Low-Voltage TTL (LVTTL) logic input levels and produces differential output signals that comply with the LVDS standard (TIA/EIA-644A). This makes it suitable for high-speed data transmission applications requiring low power and high signal integrity.
Key Specifications
| Parameter | Test Conditions | Unit | Min | Max | |
|---|---|---|---|---|---|
| VOD (Differential Output Voltage Magnitude) | RL = 100 Ω | mV | 247 | 340 | 454 |
| ΔVOD (Change in Differential Output Voltage Magnitude) | RL = 100 Ω | mV | –50 | 50 | 50 |
| VOC(SS) (Steady-State Common-Mode Output Voltage) | V | 1.125 | 1.2 | 1.375 | |
| ICC (Supply Current) | VI = 0.8 V or 2 V, Enabled, No load | mA | 4.7 | 8 | |
| tPLH (Propagation Delay Time, Low-to-High-Level Output) | RL = 100 Ω, CL = 10 pF | ns | 0.5 | 1.4 | 2 |
| tPHL (Propagation Delay Time, High-to-Low-Level Output) | RL = 100 Ω, CL = 10 pF | ns | 1 | 1.7 | 2.5 |
| tr (Differential Output Signal Rise Time) | 20% to 80% | ns | 0.4 | 0.5 | 0.6 |
| tf (Differential Output Signal Fall Time) | 80% to 20% | ns | 0.4 | 0.5 | 0.6 |
Key Features
- Meets or exceeds the requirements of ANSI TIA/EIA-644 Standard for LVDS.
- Low-Voltage Differential Signaling with typical output voltage of 350 mV and 100-Ω load.
- Typical output voltage rise and fall times of 500 ps (400 Mbps).
- Typical propagation delay times of 1.7 ns.
- Operates from a single 3.3-V supply (can be as low as 3 V and as high as 3.6 V).
- Power dissipation of 25 mW typical per driver at 200 MHz.
- Driver at high-impedance when disabled or with VCC = 0.
- Bus-terminal ESD protection exceeds 8 kV.
- Low-Voltage TTL (LVTTL) logic input levels.
- PIN compatible with AM26LS31, MC3487, and μA9638.
- Cold sparing for space and high-reliability applications requiring redundancy.
Applications
- Wireless Infrastructure
- Telecom Infrastructure
- Printers
- Point-to-point and multidrop data transmission over controlled impedance media such as printed-circuit board traces, backplanes, or cables.
Q & A
- What is the operating temperature range of the SN65LVDS9638DR?
The SN65LVDS9638DR is characterized for operation from –40°C to 85°C.
- What is the typical output voltage of the SN65LVDS9638DR?
The typical output voltage is 340 mV with a 100-Ω load.
- What is the propagation delay time of the SN65LVDS9638DR?
The typical propagation delay time is 1.7 ns.
- What is the power dissipation of the SN65LVDS9638DR at 200 MHz?
The power dissipation is 25 mW typical per driver at 200 MHz.
- What type of input signals does the SN65LVDS9638DR accept?
The device accepts Low-Voltage TTL (LVTTL) logic input levels.
- What is the ESD protection level of the SN65LVDS9638DR?
The bus-terminal ESD protection exceeds 8 kV.
- Is the SN65LVDS9638DR PIN compatible with other devices?
Yes, it is PIN compatible with AM26LS31, MC3487, and μA9638.
- What are the typical rise and fall times of the differential output signal?
The typical rise and fall times are 500 ps (400 Mbps).
- How should unused enable pins be handled?
Unused enable pins should be tied to VCC or GND as appropriate.
- What is the recommended handling for NC pins?
NC pins should be grounded at the board level for optimum thermal performance.
