Overview
The Texas Instruments SN65DSI84ZXHR is a high-performance, low-power MIPI DSI to FlatLink™ LVDS bridge. This component is designed to support the latest display interface standards, making it suitable for a wide range of applications requiring high-resolution video transmission. The SN65DSI84 features a single-channel MIPI D-PHY receiver front-end with up to four data lanes per channel, operating at 1 Gbps per lane. It is compatible with various micro-processors and includes advanced power management features such as low-swing LVDS outputs and MIPI ultra-low power state (ULPS) support. The device is packaged in a 64-pin 5x5mm nFBGA and operates across a temperature range from -40°C to 85°C.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Package Type | nFBGA (ZXH) | |
| Pins | 64 | |
| Package Size | 5.00 mm × 5.00 mm | |
| Operating Temperature Range | -40 to 85 | °C |
| Main VCC Power Supply | 1.8 V | V |
| DSI HS Clock Input Frequency | 40 to 500 MHz | |
| LVDS Output Clock Range | 25 to 154 MHz | |
| DSI Data Lanes per Channel | 1, 2, 3, or 4 | |
| LVDS Output Differential Impedance | 90 to 132 Ω | |
| Junction-to-Ambient Thermal Resistance | 55.1 °C/W |
Key Features
- Implements MIPI D-PHY version 1.00.00 physical layer front-end and display serial interface (DSI) version 1.02.00.
- Single channel DSI receiver configurable for one, two, three, or four D-PHY data lanes per channel operating up to 1 Gbps per lane.
- Supports 18 bpp and 24-bpp DSI video packets with RGB666 and RGB888 formats.
- Suitable for 60-fps WUXGA 1920 × 1200 resolution at 18-bpp and 24-bpp color, 60 fps 1366 × 768 at 18 bpp and 24 bpp.
- FlatLink™ output configurable for single-link or dual-link LVDS.
- LVDS pixel clock may be sourced from free-running continuous D-PHY clock or external reference clock (REFCLK).
- Low power features include shutdown mode, reduced LVDS output voltage swing, common mode, and MIPI ultra-low power state (ULPS) support.
- LVDS channel swap, LVDS PIN order reverse feature for ease of PCB routing.
- ESD rating ±2 kV (HBM).
Applications
The SN65DSI84ZXHR is well-suited for various high-resolution display applications, including:
- Notebook computers
- Tablets and mobile devices
- Automotive infotainment systems
- Industrial display systems
- Any application requiring high-speed, low-power video transmission over MIPI DSI and LVDS interfaces.
Q & A
- What is the primary function of the SN65DSI84ZXHR?
The SN65DSI84ZXHR is a MIPI DSI to FlatLink™ LVDS bridge, converting MIPI DSI video data streams to LVDS outputs.
- What is the maximum resolution supported by the SN65DSI84ZXHR?
The device supports up to WUXGA 1920 × 1200 resolution at 60 frames per second with up to 24 bits-per-pixel.
- What are the key power management features of the SN65DSI84ZXHR?
The device includes low-swing LVDS outputs, shutdown mode, reduced LVDS output voltage swing, and MIPI ultra-low power state (ULPS) support.
- What is the operating temperature range of the SN65DSI84ZXHR?
The device operates across a temperature range from -40°C to 85°C.
- What is the package type and size of the SN65DSI84ZXHR?
The device is packaged in a 64-pin 5x5mm nFBGA (ZXH).
- What are the supported DSI video packet formats?
The device supports 18 bpp and 24-bpp DSI video packets with RGB666 and RGB888 formats.
- Can the LVDS pixel clock be sourced from an external reference clock?
- What is the ESD rating of the SN65DSI84ZXHR?
- What are some common applications for the SN65DSI84ZXHR?
- What is the maximum data rate per lane for the DSI interface?
