Overview
The SCANSTA112SMX/NOPB, produced by Texas Instruments, is a 7-port multidrop IEEE 1149.1 (JTAG) multiplexer designed to extend the IEEE Std. 1149.1 test bus into a multidrop test bus environment. This device enhances test throughput and allows for the removal of a board from the system while retaining test access to the remaining modules. It supports up to 7 local IEEE 1149.1 scan chains, which can be accessed individually or combined serially.
Key Specifications
Specification | Value |
---|---|
Package | NFBGA (NZD) - 100 pins |
Operating Temperature Range (°C) | -40 to 85 |
Supply Voltage (VCC) | 3.0 - 3.6V |
Number of Local Scan Ports | 7 IEEE 1149.1-Compatible Configurable Local Scan Ports |
Address Inputs | 8 Address Inputs supporting up to 249 Unique Slot Addresses |
TCK Counter | 32-bit |
LFSR Signature Compactor | 16-bit |
Moisture Sensitivity | Yes |
Key Features
- True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
- Bi-directional Backplane and LSP0 Ports are Interchangeable Slave Ports
- Stitcher Mode Bypasses Level 1 and 2 Protocols
- Mode Register Allows Local TAPs to be Bypassed, Selected for Insertion into the Scan Chain Individually, or Serially in Groups of Two or Three
- Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to Those on a Single Local Scan Port
- General Purpose Local Port Pass Through Bits for Delivering Write Pulses for Flash Programming or Monitoring Device Status
- Known Power-Up State and TRST on all Local Scan Ports
- Local TAPs can Become TRI-STATE via the OE Input to Allow an Alternate Test Master to Take Control of the Local TAPs
- Supports Live Insertion/Withdrawal
Applications
The SCANSTA112SMX/NOPB is suitable for various testing and debugging applications in complex electronic systems. It is particularly useful in environments where multiple boards or modules need to be tested simultaneously without disrupting the entire system. This includes:
- Backplane and inter-board testing
- Flash programming and device status monitoring
- Built-in self-test operations
- Systems requiring high test throughput and flexibility in test access
Q & A
- What is the primary function of the SCANSTA112SMX/NOPB? The primary function is to extend the IEEE Std. 1149.1 test bus into a multidrop test bus environment, enhancing test throughput and flexibility.
- How many local scan ports does the SCANSTA112SMX/NOPB support? It supports up to 7 local IEEE 1149.1 scan ports.
- What is the operating temperature range of the SCANSTA112SMX/NOPB? The operating temperature range is -40°C to 85°C.
- What is the supply voltage range for the SCANSTA112SMX/NOPB? The supply voltage range is 3.0V to 3.6V.
- Can the backplane port and LSP0 port be configured as master or slave? Yes, they are bidirectional and can be configured to act as either master or slave ports.
- What is the purpose of the 32-bit TCK counter? The 32-bit TCK counter enables built-in self-test operations to be performed on one port while other scan chains are simultaneously tested.
- Does the SCANSTA112SMX/NOPB support live insertion/withdrawal? Yes, it supports live insertion/withdrawal.
- How many unique slot addresses can the 8 address inputs support? The 8 address inputs support up to 249 unique slot addresses, an interrogation address, a broadcast address, and 4 multi-cast group addresses.
- What is the purpose of the transparent mode in the SCANSTA112SMX/NOPB? The transparent mode can be enabled with a single instruction to conveniently buffer the backplane IEEE 1149.1 pins to those on a single local scan port.
- Can local TAPs become TRI-STATE in the SCANSTA112SMX/NOPB? Yes, local TAPs can become TRI-STATE via the OE input to allow an alternate test master to take control of the local TAPs.