Overview
The LMK01801BISQ/NOPB, produced by Texas Instruments, is a dual clock divider buffer designed for high-performance clock distribution and frequency division. This device is optimized for systems requiring low noise and precise clocking, making it suitable for a variety of applications including wireless infrastructure, datacom and telecom, medical imaging, test and measurement, and military/aerospace.
The LMK01801 features two independent clock inputs that drive separate output banks, each with programmable differential outputs supporting LVPECL, LVDS, and LVCMOS signaling. The device operates within an industrial temperature range of –40°C to 85°C and supports a supply voltage of 3.15 to 3.45 V.
Key Specifications
Parameter | Min | Typ | Max | Unit |
---|---|---|---|---|
Supply Voltage (VCC) | 3.15 | 3.3 | 3.45 | V |
Input Frequency Range | 1 kHz | 3.1 GHz | ||
Output Frequency Range | 3.1 GHz | |||
Number of Outputs | 14 | |||
Output Types | LVPECL, LVDS, LVCMOS | |||
Divider Values (Bank A) | 1 | 8 (even and odd) | ||
Divider Values (Bank B) | 1 | 1045 or 1 to 8 (even and odd) | ||
RMS Additive Jitter | 50 fs | |||
Operating Temperature Range | –40°C | 85°C | ||
Package Type | 48-Lead WQFN |
Key Features
- Pin control mode or MICROWIRE (SPI) interface for configuration
- Input and output frequency range: 1 kHz to 3.1 GHz
- Separate inputs for clock output banks A and B
- 14 differential clock outputs in two banks (A and B)
- Bank A: 8 differential, programmable outputs (up to 8 as LVCMOS)
- Bank B: 6 differential outputs (or up to 12 as LVCMOS)
- Divider values of 1 to 8 (even and odd) for Bank A, and 1 to 1045 or 1 to 8 (even and odd) for Bank B
- Analog and digital delays
- 50% duty cycle on all outputs for all divides
- Separate synchronization of bank A and B
- Extremely low residual noise and RMS additive jitter of 50 fs at 800 MHz
Applications
- High Performance Clock Distribution and Division
- Wireless Infrastructure
- Datacom and Telecom Clock Distribution
- Medical Imaging
- Test and Measurement
- Military / Aerospace
Q & A
- What is the input frequency range of the LMK01801?
The input frequency range is from 1 kHz to 3.1 GHz.
- How many differential clock outputs does the LMK01801 have?
The device has 14 differential clock outputs divided into two banks (A and B).
- What are the supported output types for the LMK01801?
The device supports LVPECL, LVDS, and LVCMOS output types.
- What is the typical RMS additive jitter of the LMK01801?
The typical RMS additive jitter is 50 fs at 800 MHz.
- What is the operating temperature range of the LMK01801?
The operating temperature range is from –40°C to 85°C.
- What are the divider values for Bank A and Bank B?
Bank A supports divider values of 1 to 8 (even and odd), while Bank B supports divider values of 1 to 1045 or 1 to 8 (even and odd).
- Does the LMK01801 support analog and digital delays?
Yes, the device supports both analog and digital delays.
- What is the duty cycle of the clock outputs?
The duty cycle of the clock outputs is 50% for all divides.
- Can the clock output banks be synchronized separately?
Yes, the clock output banks A and B can be synchronized separately.
- What is the package type of the LMK01801?
The device is available in a 48-Lead WQFN package.