Overview
The LMK00301SQE/NOPB is a 3-GHz, 10-output differential fanout buffer and level translator produced by Texas Instruments. This component is designed for high-frequency, low-jitter clock and data distribution, making it ideal for various high-speed applications. It features a 3:1 input multiplexer, allowing the selection of the input clock from two universal inputs or one crystal input. The selected input clock is then distributed to two banks of five differential outputs and one LVCMOS output. The device operates from a 3.3-V core supply and three independent 3.3-V or 2.5-V output supplies, ensuring high performance, versatility, and power efficiency.
Key Specifications
| Parameter | Description | Value |
|---|---|---|
| Package | WQFN (RHS) | 48 pins, 7.00 mm × 7.00 mm |
| Operating Temperature Range | -40°C to 85°C | |
| Input Frequency Range | Universal Inputs | Up to 3.1 GHz |
| Crystal Input Frequency Range | 10 MHz to 40 MHz | |
| Output Types | LVPECL, LVDS, HCSL, or Hi-Z (selectable per bank) | |
| LVPECL Additive Jitter | 20 fs RMS (10 kHz to 1 MHz), 51 fs RMS (12 kHz to 20 MHz) | |
| Frequency Range | LVPECL: DC to 3100 MHz, LVDS: DC to 2100 MHz, HCSL: DC to 800 MHz, LVCMOS: DC to 250 MHz | |
| PSRR | -65 dBc (LVPECL), -76 dBc (LVDS) at 156.25 MHz | |
| Core Supply Voltage | 3.3 V ± 5% | |
| Output Supply Voltages | 3.3 V or 2.5 V ± 5% (three independent supplies) |
Key Features
- 3:1 input multiplexer with two universal inputs and one crystal input
- Two universal inputs operate up to 3.1 GHz and accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clocks
- One crystal input accepts 10 MHz to 40 MHz crystal or single-ended clock
- Two banks with five differential outputs each, configurable as LVPECL, LVDS, HCSL, or Hi-Z per bank
- LVCMOS output with synchronous enable input for runt-pulse-free operation
- Pin-controlled configuration
- High PSRR: -65 dBc (LVPECL) and -76 dBc (LVDS) at 156.25 MHz
- Ultra-low additive jitter: 20 fs RMS (10 kHz to 1 MHz), 51 fs RMS (12 kHz to 20 MHz)
Applications
- Clock distribution and level translation for ADCs, DACs, multi-gigabit Ethernet, XAUI, Fibre Channel, SATA/SAS, SONET/SDH, CPRI
- Switches, routers, line cards, timing cards
- Servers, computing, PCI Express (PCIe 3.0, 4.0, 5.0, 6.0)
- Remote radio units and baseband units
- High-frequency backplanes
Q & A
- What is the maximum frequency range of the universal inputs on the LMK00301?
The universal inputs on the LMK00301 operate up to 3.1 GHz.
- What types of output signals can the LMK00301 generate?
The LMK00301 can generate LVPECL, LVDS, HCSL, or Hi-Z output signals, selectable per bank.
- What is the range of the crystal input frequency on the LMK00301?
The crystal input on the LMK00301 accepts frequencies from 10 MHz to 40 MHz.
- What is the additive jitter performance of the LMK00301?
The LMK00301 has an additive jitter of 20 fs RMS (10 kHz to 1 MHz) and 51 fs RMS (12 kHz to 20 MHz) with an LMK03806 clock source at 156.25 MHz.
- What are the power supply requirements for the LMK00301?
The LMK00301 operates from a 3.3-V core supply and three independent 3.3-V or 2.5-V output supplies.
- What is the operating temperature range of the LMK00301?
The operating temperature range of the LMK00301 is -40°C to 85°C.
- What types of applications is the LMK00301 suitable for?
The LMK00301 is suitable for clock distribution and level translation in high-speed applications such as multi-gigabit Ethernet, servers, computing, and remote radio units.
- Does the LMK00301 require power supply sequencing?
Yes, the LMK00301 requires power supply sequencing where all core and output supplies must ramp at the same time or be tied together. However, the LMK00301A design spin does not have this requirement.
- How many differential output pairs does the LMK00301 provide?
The LMK00301 provides two banks with five differential output pairs each.
- What is the PSRR of the LMK00301?
The LMK00301 has a high PSRR of -65 dBc (LVPECL) and -76 dBc (LVDS) at 156.25 MHz.
