Overview
The DP83849IFVS-EVK is a development and evaluation kit produced by Texas Instruments, formerly National Semiconductor. This kit is designed to facilitate the evaluation and integration of the DP83849IFVS Ethernet PHY (Physical Layer) device into various network systems. The DP83849IFVS-EVK provides a comprehensive platform for developers to test and validate the performance of the DP83849IFVS in different configurations, including IEEE 802.3 MII, RMII, and SNI interfaces.
Key Specifications
| Specification | Description |
|---|---|
| PHY Device | DP83849IFVS |
| Interfaces | MII, RMII, SNI |
| PHY Addresses | Default: 00h (Port A), 01h (Port B); Configurable up to 30h (Port A) and 31h (Port B) |
| LEDs | 9 LEDs: 1 power, 2 INTERRUPT, 6 others (2 LINK, 2 SPEED, 2 ACT/COL) |
| Power Supply | 5V/3.3V from MII connector, or POE via RJ-45 connector |
| Clock Source | 25 MHz crystal (default), or 50 MHz oscillator for RMII configuration |
| Connectors | MII headers, RJ-45 connectors, JTAG header, Integrity Interface header |
| PCB Layout | FR4 material, 4 layers, uniform supply & ground plane, 5.875” x 5.25” |
Key Features
- Multiple PHY Addresses with configurable settings
- Support for MII, RMII, and SNI interfaces
- 9 LEDs for status indication (power, interrupt, link, speed, activity/collision)
- Strap options for ports (A and B) including energy detect, MDIX, LED configuration, and auto-negotiation
- FX_EN jumper for fiber mode (Port B only)
- EXTENDER_EN jumper for extender mode
- CLK2MAC_DIS jumper to disable clock to MAC output
- RESET_N jumper for external reset
- PWR_DWN/INT jumper for power down and interrupt mode
- On-board clock with crystal or oscillator options
- Dual-sided component placement and low-cost design
Applications
The DP83849IFVS-EVK is suitable for a variety of Ethernet-based applications, including:
- Network equipment such as switches, routers, and gateways
- Industrial Ethernet devices
- Embedded systems requiring Ethernet connectivity
- Development and testing of Ethernet PHY devices in different configurations
Q & A
- What is the primary purpose of the DP83849IFVS-EVK?
The primary purpose is to provide a development and evaluation platform for the DP83849IFVS Ethernet PHY device.
- What interfaces does the DP83849IFVS-EVK support?
The kit supports MII, RMII, and SNI interfaces.
- How is the power supply for the DP83849IFVS-EVK configured?
Power can be supplied through the MII connector (5V/3.3V) or via a POE connector.
- What are the clock source options for the DP83849IFVS-EVK?
The kit uses a 25 MHz crystal by default, but can be configured to use a 50 MHz oscillator for RMII mode.
- What kind of connectors are available on the DP83849IFVS-EVK?
The kit includes MII headers, RJ-45 connectors, a JTAG header, and an Integrity Interface header.
- How do I configure the PHY addresses on the DP83849IFVS-EVK?
PHY addresses can be configured using jumpers J36 and J37.
- What is the purpose of the EXTENDER_EN jumper?
The EXTENDER_EN jumper is used to set the device into extender mode, which is supported by the DP83849IVS and DP83849IFVS devices.
- How do I access the device registers on the DP83849IFVS-EVK?
Device registers can be accessed through MDIO using SmartBits, a parallel cable, or the Integrity Interface.
- What software is required for this board?
No device-specific software is required, but National provides the Integrity Utility for diagnostic and configuration purposes.
- What are the dimensions and material of the PCB?
The PCB is made of FR4 material, is 4 layers thick, and measures 5.875” x 5.25”.
