Overview
The CDCLVD1213RGTT is a low additive jitter LVDS clock buffer produced by Texas Instruments. This device is designed to distribute an input clock to 4 pairs of differential LVDS clock outputs, ensuring minimal jitter and high signal integrity. The input can be either LVDS, LVPECL, or CML, making it versatile for various clock distribution applications. The CDCLVD1213 contains a high-performance divider for one output, allowing the input clock signal to be divided by a factor of 1, 2, or 4. It operates in a 2.5-V supply environment and is characterized over an industrial temperature range of –40°C to 85°C.
Key Specifications
Parameter | Value | Unit |
---|---|---|
Package | VQFN (RGT) | - |
Pins | 16 | - |
Operating Temperature Range | –40 to 85 | °C |
Device Power Supply | 2.375 V to 2.625 V | V |
Clock Frequency | Up to 800 MHz | MHz |
Low Additive Jitter | < 300 fs RMS (10 kHz to 20 MHz) | fs |
Low Output Skew | 20 ps (Maximum) | ps |
Selectable Divider Ratio | 1, /2, /4 | - |
LVDS Outputs | 4 pairs, ANSI EIA/TIA-644A Standard Compatible | - |
ESD Protection | Exceeds 3-kV HBM, 1-kV CDM | - |
Key Features
- 1:4 Differential Buffer
- Low Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHz
- Low Output Skew of 20 ps (Maximum)
- Selectable Divider Ratio 1, /2, /4
- Universal Input Accepts LVDS, LVPECL, and CML
- 4 LVDS Outputs, ANSI EIA/TIA-644A Standard Compatible
- Clock Frequency: Up to 800 MHz
- Device Power Supply: 2.375 V to 2.625 V
- Industrial Temperature Range: –40°C to 85°C
- Packaged in 3 mm × 3 mm, 16-Pin VQFN (RGT)
- ESD Protection Exceeds 3-kV HBM, 1-kV CDM
- Fail-safe function and input hysteresis to prevent random oscillation
Applications
- Telecommunications and Networking
- Medical Imaging
- Test and Measurement Equipment
- Wireless Communications
- General-Purpose Clocking
Q & A
- What is the primary function of the CDCLVD1213RGTT?
The CDCLVD1213RGTT is a clock buffer that distributes an input clock to 4 pairs of differential LVDS clock outputs with low additive jitter.
- What types of input signals can the CDCLVD1213RGTT accept?
The device can accept LVDS, LVPECL, or CML input signals.
- What is the maximum clock frequency supported by the CDCLVD1213RGTT?
The device supports clock frequencies up to 800 MHz.
- What is the operating temperature range of the CDCLVD1213RGTT?
The device operates over an industrial temperature range of –40°C to 85°C.
- What is the package type and size of the CDCLVD1213RGTT?
The device is packaged in a 3 mm × 3 mm, 16-Pin VQFN (RGT) package.
- Does the CDCLVD1213RGTT have ESD protection?
Yes, the device exceeds 3-kV HBM and 1-kV CDM ESD protection.
- What is the purpose of the divider in the CDCLVD1213RGTT?
The divider allows the input clock signal to be divided by a factor of 1, 2, or 4 for one of the outputs.
- How does the CDCLVD1213RGTT prevent random oscillation of the outputs?
The device incorporates an input hysteresis to prevent random oscillation in the absence of an input signal.
- What are some common applications of the CDCLVD1213RGTT?
Common applications include telecommunications, medical imaging, test and measurement equipment, wireless communications, and general-purpose clocking.
- What is the recommended termination for LVDS outputs?
Proper LVDS termination involves using a 100 Ω resistor between the outputs on the receiver end, either DC-coupled or AC-coupled.