Overview
The ADS6443IRGCT from Texas Instruments is a high-performance, quad-channel, 14-bit analog-to-digital converter (ADC) designed for demanding applications. This device is part of the ADS644X family, which includes the ADS6445, ADS6444, ADS6443, and ADS6442 models. The ADS6443IRGCT operates at a maximum sample rate of 80 MSPS and is known for its simultaneous sample and hold capability across all four channels.
The device features a compact 64-pin QFN package, enhancing system integration density. It supports various clock inputs, including sine, LVCMOS, LVPECL, and LVDS, with clock amplitudes down to 400 mVPP. The ADC includes internal references but also supports external reference modes, making it versatile for different application requirements.
Key Specifications
| Parameter | Unit | Typical Value | Minimum Value | Maximum Value |
|---|---|---|---|---|
| Resolution | Bits | 14 | 14 | 14 |
| Maximum Sample Rate | MSPS | 80 | - | - |
| Differential Input Voltage Range | VPP | 2.0 | 2.0 | 2.0 |
| Input Capacitance | pF | 7 | - | - |
| Channel Gain Error Temperature Coefficient | Δ%/°C | 0.005 | - | - |
| Differential Nonlinearity (DNL) | LSB | ±0.5 | -0.9 | 1.8 |
| Integral Nonlinearity (INL) | LSB | ±2 | -4.5 | 4.5 |
| Total Supply Current | mA | 360 | - | - |
| Operating Temperature Range | °C | -40 to 85 | -40 | 85 |
Key Features
- Simultaneous Sample and Hold: All four channels sample and hold simultaneously, ensuring synchronized data acquisition.
- Programmable Gain Options: The device includes a 3.5dB coarse gain option and fine gain options programmable in 1dB steps up to 6dB, allowing for trade-offs between SFDR and SNR.
- Serialized LVDS Outputs: Data is output over two LVDS pairs, reducing the serial data rate and easing receiver design. The device also supports traditional 1-wire interfaces at lower sampling frequencies.
- Internal Phase Lock Loop (PLL): The PLL multiplies the incoming ADC sampling clock to derive the bit clock, used to serialize the 14-bit data from each channel.
- Programmable LVDS Currents and Internal Termination: Features such as programmable LVDS currents, current doubling modes, and internal termination options improve signal integrity and ease capture by the receiver.
- Flexible Output Formats: The ADC channel outputs can be transmitted as MSB or LSB first and in 2's complement or straight binary formats.
Applications
- Base-Station IF Receivers: The high-speed and high-resolution capabilities make it suitable for base-station intermediate frequency (IF) receivers.
- Diversity Receivers: It is used in diversity receivers due to its ability to handle multiple channels simultaneously.
- Medical Imaging: The device's high accuracy and speed are beneficial in medical imaging applications.
- Test Equipment: It is used in various test and measurement equipment requiring high-speed data acquisition.
Q & A
- What is the maximum sample rate of the ADS6443IRGCT?
The maximum sample rate of the ADS6443IRGCT is 80 MSPS.
- What is the resolution of the ADS6443IRGCT?
The resolution of the ADS6443IRGCT is 14 bits.
- What types of clock inputs does the ADS6443IRGCT support?
The device supports sine, LVCMOS, LVPECL, and LVDS clock inputs.
- What is the operating temperature range of the ADS6443IRGCT?
The operating temperature range is from –40°C to 85°C.
- Does the ADS6443IRGCT support external reference modes?
Yes, the device supports both internal and external reference modes.
- What is the package type of the ADS6443IRGCT?
The device is packaged in a 64-pin QFN package.
- How does the ADS6443IRGCT output data?
The data is output over two LVDS pairs, reducing the serial data rate and easing receiver design.
- What are the programmable gain options available on the ADS6443IRGCT?
The device includes a 3.5dB coarse gain option and fine gain options programmable in 1dB steps up to 6dB.
- What are some common applications of the ADS6443IRGCT?
Common applications include base-station IF receivers, diversity receivers, medical imaging, and test equipment.
- How does the internal PLL function in the ADS6443IRGCT?
The internal PLL multiplies the incoming ADC sampling clock to derive the bit clock used to serialize the 14-bit data from each channel.
