Overview
The PSD835G2-90UI, produced by STMicroelectronics, is a highly integrated memory system designed for use with 8-bit microcontrollers (MCUs). This component combines Flash memory, SRAM, and programmable logic (PLD) in a single package, offering advanced features such as In-System Programmability (ISP) via JTAG. It is particularly useful for applications requiring flexible memory and logic solutions.
Key Specifications
| Specification | Value |
|---|---|
| Primary Flash Memory | 4 Mbits (8 uniform sectors, 64 Kbytes each) |
| Secondary Flash Memory | 256 Kbits (4 sectors) |
| SRAM | 64 Kbits |
| PLD Gates | Over 3000 gates (CPLD and DPLD) |
| Output Macrocells (OMCs) | 16 |
| Input Macrocells (IMCs) | 24 |
| I/O Ports | 52 reconfigurable I/O ports |
| Supply Voltage | 5 V ± 10% |
| Access Time | 70 ns for VCC = 4.5 to 5.5 V |
| Standby Current | As low as 50 µA |
| Erase/Write Cycles | 100,000 for Flash memory, 1,000 for PLD |
| Data Retention | 15 years |
Key Features
- In-System Programmability (ISP) via JTAG, allowing full-chip programming without the need for expensive sockets.
- Dual bank Flash memories with concurrent operation: READ from one memory while erasing and writing the other.
- 64 Kbits of SRAM for additional data storage.
- Programmable Logic (PLD) with over 3000 gates, including CPLD and DPLD, and user-defined internal chip select decoding.
- 52 individually configurable I/O port pins that can be used for MCU I/Os, PLD I/Os, latched MCU address output, and special function I/Os.
- Internal page register to expand the microcontroller address space by a factor of 256.
- Programmable power management and low standby current.
- High endurance with 100,000 Erase/Write cycles for Flash memory and 1,000 cycles for PLD.
Applications
The PSD835G2-90UI is suitable for a variety of applications that require integrated memory and programmable logic solutions. These include:
- Embedded systems where in-system programmability and flexible memory management are crucial.
- Industrial control systems that need robust and reliable memory and logic functions.
- Automotive electronics where high endurance and low power consumption are essential.
- Consumer electronics that require advanced memory and logic capabilities.
Q & A
- What is the primary function of the PSD835G2-90UI?
The PSD835G2-90UI is a memory system that integrates Flash memory, SRAM, and programmable logic (PLD) for use with 8-bit microcontrollers. - What is the capacity of the primary Flash memory?
The primary Flash memory has a capacity of 4 Mbits, organized into 8 uniform sectors of 64 Kbytes each. - How many I/O ports does the PSD835G2-90UI have?
The PSD835G2-90UI has 52 reconfigurable I/O ports. - What is the supply voltage range for the PSD835G2-90UI?
The supply voltage range is 5 V ± 10%. - What is the access time for the Flash memory and SRAM?
The access time is 70 ns for VCC = 4.5 to 5.5 V. - How many Erase/Write cycles can the Flash memory endure?
The Flash memory can endure 100,000 Erase/Write cycles. - What is the data retention period for the PSD835G2-90UI?
The data retention period is 15 years. - Does the PSD835G2-90UI support in-system programming?
Yes, it supports In-System Programmability (ISP) via JTAG. - What types of PLD does the PSD835G2-90UI include?
The PSD835G2-90UI includes both CPLD and DPLD with over 3000 gates. - What is the standby current of the PSD835G2-90UI?
The standby current is as low as 50 µA.
