Overview
The DS90LV001TLD, produced by National Semiconductor (now part of Texas Instruments), is a 3.3V LVDS-LVDS Buffer designed to enhance signal integrity in high-speed data transmission systems. This device takes an LVDS input signal and provides an LVDS output signal, making it particularly useful in large systems where signals are distributed across backplanes. The DS90LV001TLD helps mitigate the impact of 'stub length' or the distance between the transmission line and the receivers on individual cards, which can limit system speed. By allowing the receiver to be placed close to the main transmission line, this buffer improves overall system performance.
Key Specifications
Parameter | Value | Units |
---|---|---|
Supply Voltage | 3 V ~ 3.6 V | V |
Supply Current (ICCD) | 47 mA (typ), 70 mA (max) | mA |
Supply Current (ICCZ) in TRI-STATE | 22 mA (typ), 35 mA (max) | mA |
Operating Temperature | -40°C ~ 85°C | °C |
Data Rate | 800 Mbps | Mbps |
Number of Channels | 1 | - |
Propagation Delay | 1.4 ns (typ) | ns |
Peak-to-Peak Jitter | 100 ps (typ) with PRBS = 223−1 data pattern | ps |
Input Threshold | < ±100 mV | mV |
Package Type | 8-pin SOIC, 8-pin WSON (WFDFN Exposed Pad) | - |
Key Features
- Single +3.3 V Supply
- LVDS receiver inputs accept LVPECL signals
- TRI-STATE outputs
- Fast propagation delay of 1.4 ns (typ)
- Low jitter 800 Mbps fully differential data path
- 100 ps (typ) of pk-pk jitter with PRBS = 223−1 data pattern at 800 Mbps
- Compatible with ANSI/TIA/EIA-644-A LVDS standard
- Space-saving 8-pin WSON package (70% smaller than SOIC)
- Industrial Temperature Range
Applications
The DS90LV001TLD is primarily used in high-speed data transmission systems, particularly where signals need to be distributed across backplanes. It is effective in reducing the impact of 'stub length' and improving system performance. Common applications include:
- High-speed data transmission systems
- Backplane signal distribution
- LVDS and LVPECL signal translation
- Systems requiring low jitter and fast propagation delay
Q & A
- What is the primary function of the DS90LV001TLD?
The DS90LV001TLD is an LVDS-LVDS Buffer that takes an LVDS input signal and provides an LVDS output signal, helping to improve signal integrity in high-speed data transmission systems.
- What are the package options available for the DS90LV001TLD?
The device is available in 8-pin SOIC and 8-pin WSON (WFDFN Exposed Pad) packages.
- What is the maximum data rate supported by the DS90LV001TLD?
The DS90LV001TLD supports a maximum data rate of 800 Mbps.
- Can the DS90LV001TLD receive LVPECL signals?
- What is the typical propagation delay of the DS90LV001TLD?
The typical propagation delay is 1.4 ns.
- How does the DS90LV001TLD improve system performance?
The device improves system performance by allowing the receiver to be placed very close to the main transmission line, thus reducing the impact of 'stub length' and enhancing signal integrity.
- Is the DS90LV001TLD compatible with any specific LVDS standard?
- What is the operating temperature range of the DS90LV001TLD?
The operating temperature range is -40°C to 85°C.
- Can the LVDS output of the DS90LV001TLD be placed in TRI-STATE?
- What is the typical peak-to-peak jitter of the DS90LV001TLD?
The typical peak-to-peak jitter is 100 ps with a PRBS = 223−1 data pattern at 800 Mbps.