Overview
The PTN3460BS,518 is an embedded DisplayPort (eDP) to LVDS bridge device manufactured by NXP USA Inc. This semiconductor component is designed to enable connectivity between an eDP source, such as a CPU, GPU, or chipset, and an LVDS display panel. It processes the incoming DisplayPort stream, performs the necessary protocol conversion, and transmits the processed stream in LVDS format. The device supports high-speed data transfer and is versatile in its configuration options, making it suitable for various platform environments.
Key Specifications
| Parameter | Specification |
|---|---|
| Package Type | HVQFN56 (7 mm x 7 mm, 0.4 mm pitch) |
| Supply Voltage | 3.3 V ± 10% (single supply) or 3.3 V ± 10%, 1.8 V ± 5% (dual supplies) |
| DisplayPort Link Rate | 1.62 Gbit/s or 2.7 Gbit/s |
| DisplayPort Lanes | 1-lane or 2-lane operation |
| LVDS Signaling | Single bus or dual bus, 18 bits or 24 bits per pixel |
| Pixel Clock Frequency | Up to 112 MHz |
| LVDS Data Packing | VESA or JEIDA format |
| Operating Temperature | 0°C to 70°C |
| ESD Protection | 8 kV HBM, 1 kV CDM |
Key Features
- Embedded microcontroller and on-chip Non-Volatile Memory (NVM) for firmware updates and flexibility.
- LVDS panel power-up/down sequencing control and firmware-controlled timing parameters.
- No external timing reference needed.
- EDID ROM emulation to support panels without EDID ROM, supporting EDID structure v1.3 and up to seven different EDID data structures.
- eDP complying PWM signal generation or PWM signal pass-through from eDP source.
- Programmable LVDS signal swing to pre-compensate for channel attenuation or allow for power saving.
- Supports PCB routing flexibility by programming for LVDS bus swapping, channel swapping, and differential signal pair swapping.
- Data Enable polarity programming and DDC control for EDID ROM access via I²C-bus interface up to 400 kbit/s.
- Device programmability through multi-level configuration pins, DP AUX interface, and I²C-bus interface).
- Low-power state and deep power-saving state via dedicated pin).
Applications
- All-in-One (AIO) platforms).
- Notebook platforms).
- Netbooks and net tops).
Q & A
- What is the primary function of the PTN3460BS,518?
The PTN3460BS,518 is an embedded DisplayPort to LVDS bridge device that enables connectivity between an eDP source and an LVDS display panel.
- What are the supported DisplayPort link rates for the PTN3460BS,518?
The device supports DisplayPort link rates of 1.62 Gbit/s or 2.7 Gbit/s.
- What types of LVDS signaling does the PTN3460BS,518 support?
The device supports single bus or dual bus LVDS signaling with color depths of 18 bits or 24 bits per pixel.
- What is the maximum pixel clock frequency supported by the PTN3460BS,518?
The maximum pixel clock frequency supported is up to 112 MHz.
- How does the PTN3460BS,518 handle panels without EDID ROM?
The device can emulate EDID ROM behavior to support panels without EDID ROM, avoiding specific changes in system video BIOS.
- What are the power supply options for the PTN3460BS,518?
The device can be powered by either a single 3.3 V supply or dual supplies (3.3 V and 1.8 V).
- What is the package type and size of the PTN3460BS,518?
The device is available in the HVQFN56 package, measuring 7 mm x 7 mm with a 0.4 mm pitch.
- What are the key configuration options for the PTN3460BS,518?
The device supports configuration through multi-level configuration pins, DP AUX interface, and I²C-bus interface.
- What are some of the applications for the PTN3460BS,518?
The device is suitable for AIO platforms, notebook platforms, and netbooks/net tops.
- Does the PTN3460BS,518 support low-power modes?
Yes, the device supports low-power state and deep power-saving state via a dedicated pin.
