Overview
The PCA9665D,112 is a parallel bus to I²C-bus controller manufactured by NXP USA Inc. This device is designed to interface between standard parallel-bus microcontrollers/microprocessors and the serial I²C-bus, managing all I²C-bus specific sequences, protocol, arbitration, and timing without the need for external timing elements.
Key Specifications
Parameter | Description |
---|---|
Operating Supply Voltage | 2.3 V to 3.6 V |
I²C-bus Modes | Standard-mode, Fast-mode, and Fast-mode Plus (Fm+) |
I²C-bus Speed | Up to 1 Mbit/s |
SCL/SDA Drive Capability | Up to 25 mA |
I/O Tolerance | 5 V tolerant I/Os |
Data Buffer Size | 68 bytes |
ESD Protection | Exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101 |
Latch-up Testing | Exceeds 100 mA per JEDEC Standard JESD78 |
Packages | SO20, TSSOP20, HVQFN20 |
Key Features
- Both master and slave functions with multi-master capability
- Internal oscillator trimmed to 15% accuracy, reducing external components
- I²C-bus General Call capability
- Software reset on parallel bus
- 'Glitch-free' restart suitable for use with buffer drivers (PCA9665A)
- Eleven internal registers for configuration and data transfer
Applications
The PCA9665D,112 is suitable for various applications requiring interface between parallel-bus microcontrollers/microprocessors and I²C-bus devices. These include industrial control systems, automotive electronics, consumer electronics, and any system needing to manage I²C-bus communications efficiently.
Q & A
- What is the primary function of the PCA9665D,112?
The PCA9665D,112 acts as an interface between standard parallel-bus microcontrollers/microprocessors and the serial I²C-bus.
- What are the supported I²C-bus modes?
The device supports Standard-mode, Fast-mode, and Fast-mode Plus (Fm+).
- What is the maximum I²C-bus speed supported by the PCA9665D,112?
The device supports up to 1 Mbit/s I²C-bus speed.
- What is the drive capability of the SCL/SDA lines?
The SCL/SDA lines can drive up to 25 mA.
- Is the PCA9665D,112 tolerant to 5V I/O signals?
Yes, the device is 5 V tolerant on its I/Os.
- How many bytes of data buffer does the PCA9665D,112 have?
The device has a 68-byte data buffer.
- What kind of ESD protection does the PCA9665D,112 offer?
The device exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101.
- What packages are available for the PCA9665D,112?
The device is available in SO20, TSSOP20, and HVQFN20 packages.
- Does the PCA9665D,112 require external timing elements?
No, the device has an internal oscillator trimmed to 15% accuracy, eliminating the need for external timing elements.
- What is the purpose of the 'glitch-free' restart feature in the PCA9665A version?
The 'glitch-free' restart feature is suitable for use with buffer drivers, ensuring smooth operation without glitches.