Overview
The SMP18FPZ, produced by Analog Devices Inc., is a monolithic octal sample-and-hold integrated circuit. It features eight internal buffer amplifiers, an input multiplexer, and internal hold capacitors. Manufactured using advanced oxide isolated CMOS technology, the SMP18FPZ offers high accuracy, low droop rate, and fast acquisition time. This component is designed for systems requiring cycled calibration or an array of control voltages, making it ideal for various applications including multiple path timing deskew, mass flow/process control systems, and medical instrumentation.
Key Specifications
Parameter | Symbol | Conditions | Min | Typ | Max | Units |
---|---|---|---|---|---|---|
Linearity Error | - | -3 V ≤ VIN ≤ +3 V | - | 0.01% | - | % |
Buffer Offset Voltage (VOS) | VOS | TA = +25°C, VIN = 0 V | 2.5 | 10 | mV | |
Hold Step (VHS) | VHS | VIN = 0 V, TA = +25°C to +85°C | 4 | 6 | mV | |
Input Bias Current | - | - | - | 500 nA | - | nA |
Dual Supply Voltage | - | - | 7 | - | 15 | V |
Number of Pins | - | - | - | - | 16 | - |
Key Features
- High speed version with fast acquisition time, acquiring a 10-bit input signal to ±1/2 LSB in less than 2.5 microseconds.
- Low droop rate and high accuracy with a typical linearity error of 0.01%.
- TTL/CMOS compatible logic inputs with internally regulated TTL supply.
- Single or dual supply operation with a voltage range of 7 to 15 volts.
- Break-before-make channel addressing and internal decoder, eliminating the need for external logic.
- Available in 16-pin plastic DIP, narrow body SO-16 surface-mount SOIC package, or TSSOP-16 package.
- Buffer outputs stable with capacitive loads up to 500 pF.
Applications
- Multiple path timing deskew for A.T.E. (Automated Test Equipment) and memory programmers.
- Mass flow/process control systems.
- Multichannel data acquisition systems.
- Robotics and control systems.
- Medical and analytical instrumentation.
- Event analysis and stage lighting control.
Q & A
- What is the SMP18FPZ used for?
The SMP18FPZ is used in various applications requiring sample-and-hold functions, such as multiple path timing deskew, mass flow/process control systems, and medical instrumentation.
- What is the typical linearity error of the SMP18FPZ?
The typical linearity error of the SMP18FPZ is 0.01%.
- What is the acquisition time of the SMP18FPZ?
The SMP18FPZ can acquire a 10-bit input signal to ±1/2 LSB in less than 2.5 microseconds.
- What are the supply voltage options for the SMP18FPZ?
The SMP18FPZ can operate with either single or dual supplies over a voltage range of 7 to 15 volts.
- What types of packages is the SMP18FPZ available in?
The SMP18FPZ is available in 16-pin plastic DIP, narrow body SO-16 surface-mount SOIC package, or TSSOP-16 package.
- Is the SMP18FPZ compatible with TTL and CMOS logic?
Yes, the SMP18FPZ has TTL/CMOS compatible logic inputs with an internally regulated TTL supply.
- What is the maximum capacitive load for the buffer outputs of the SMP18FPZ?
The buffer outputs of the SMP18FPZ are stable with capacitive loads up to 500 pF.
- Does the SMP18FPZ require external logic for channel addressing?
No, the SMP18FPZ features break-before-make channel addressing and an internal decoder, eliminating the need for external logic.
- What is the current sinking capability of the SMP18FPZ outputs near VSS?
The outputs of the SMP18FPZ have limited current sinking capability near VSS.
- Is the SMP18FPZ obsolete?
Yes, the SMP18FPZ is obsolete and no longer manufactured. Available substitutes include the SMP18FSZ.