Overview
The ADN2915ACPZ, produced by Analog Devices Inc., is a high-performance Clock and Data Recovery (CDR) integrated circuit designed for continuous data rates ranging from 6.5 Mbps to 11.3 Gbps. This device is particularly suited for applications in SONET/SDH, Fibre Channel, and Ethernet networks. It automatically locks to the input data rate without the need for an external reference clock or programming, making it highly versatile and efficient.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Data Rate | 6.5 Mbps | - | 11.3 Gbps | - |
| Power Supply Voltage (VCC) | 1.14 V | 1.2 V | 1.26 V | V |
| Power Supply Voltage (VDD) | 2.97 V | 3.3 V | 3.63 V | V |
| Power Supply Current (Limiting Amp Mode) | - | 47.4 mA (at 1.25 Gbps) | - | mA |
| Total Power Dissipation (Limiting Amp Mode) | - | 420.4 mW (at 1.25 Gbps) | - | mW |
| Operating Temperature Range | -40°C | - | +85°C | °C |
| I2C Interface Clock Frequency | - | 400 kHz | - | kHz |
Key Features
- Automatic lock to data rates from 6.5 Mbps to 11.3 Gbps without an external reference clock or programming.
- Integrated limiting amplifier, equalizer, or bypass at the input, with adaptive or manual equalizer settings.
- Manual or automatic slice adjust and manual sample phase adjusts for optimizing data eye detection.
- Loss of signal (LOS) detector circuit with user-programmable threshold and hysteresis to prevent output chatter.
- Pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features.
- Compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP).
- Exceeds all SONET/SDH jitter specifications, including jitter transfer, jitter generation, and jitter tolerance.
Applications
- SONET/SDH OC-1/OC-3/OC-12/OC-48/OC-192 and associated FEC rates.
- Fibre Channel: 1GFC, 2GFC, 4GFC, 8GFC, 10GFC.
- Ethernet: 1GE, 10GE.
- WDM transponders.
- Any rate regenerators/repeaters.
Q & A
- What is the data rate range supported by the ADN2915?
The ADN2915 supports continuous data rates from 6.5 Mbps to 11.3 Gbps.
- Does the ADN2915 require an external reference clock for operation?
No, the ADN2915 automatically locks to the input data rate without the need for an external reference clock or programming.
- What are the power supply voltage options for the ADN2915?
The ADN2915 can operate with power supply voltages of 1.2 V, 1.8 V, and 3.3 V.
- What is the operating temperature range of the ADN2915?
The operating temperature range is from -40°C to +85°C.
- What types of input configurations are available for the ADN2915?
The input can be configured as a limiting amplifier, an equalizer, or a bypass, with adaptive or manual equalizer settings.
- Does the ADN2915 support PRBS generation and bit error detection?
- What is the package type and size of the ADN2915?
The ADN2915 is available in a compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP).
- What are some of the key applications for the ADN2915?
The ADN2915 is used in SONET/SDH, Fibre Channel, Ethernet networks, WDM transponders, and any rate regenerators/repeaters.
- How does the ADN2915 handle jitter specifications?
The ADN2915 exceeds all SONET/SDH jitter specifications, including jitter transfer, jitter generation, and jitter tolerance.
- What is the purpose of the LOS detector circuit in the ADN2915?
The LOS detector circuit indicates when the input signal level has fallen below a user-programmable threshold and includes hysteresis to prevent output chatter.
