Overview
The ADF4001BRUZ is a high-performance frequency synthesizer produced by Analog Devices Inc. This component is designed to implement clock sources for Phase-Locked Loops (PLLs) that require very low noise and stable reference signals. It features a low noise digital Phase Frequency Detector (PFD), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. The ADF4001 can be used in conjunction with an external loop filter and Voltage-Controlled Oscillator (VCO) or Voltage-Controlled Crystal Oscillator (VCXO) to form a complete PLL system.
Key Specifications
| Parameter | Value | Unit | Test Conditions |
|---|---|---|---|
| Operating Temperature Range | –40°C to +85°C | °C | B Version |
| Power Supply Voltage (AVDD, DVDD) | 2.7 V to 5.5 V | V | |
| Charge Pump Supply Voltage (VP) | AVDD ≤ VP ≤ 6.0 V | V | |
| Typical Operating Current | 4.5 mA | mA | TA = 25°C, AVDD = DVDD = 3 V |
| Low Power Sleep Mode Current | 1 µA | µA | TA = 25°C |
| RF Input Frequency (3 V) | 5 MHz to 165 MHz | MHz | |
| RF Input Frequency (5 V) | 10 MHz to 200 MHz | MHz | |
| Phase Noise Floor | –161 dBc/Hz @ 200 kHz | dBc/Hz | |
| Package Type | 16-Lead Thin Shrink Small Outline Package (TSSOP) |
Key Features
- 200 MHz bandwidth
- Separate charge pump supply (VP) allowing extended tuning voltage in 5 V systems
- Programmable charge pump currents
- 3-wire serial interface
- Hardware and software power-down mode
- Analog and digital lock detect
- Hardware compatible with ADF4110/ADF4111/ADF4112/ADF4113
- Ultralow phase noise
Applications
- Clock generation
- Low frequency PLLs
- Low jitter clock source
- Clock smoothing
- Frequency translation
- SONET, ATM, ADM, DSLAM, SDM
Q & A
- What is the operating temperature range of the ADF4001BRUZ? The operating temperature range is –40°C to +85°C.
- What is the typical operating current of the ADF4001BRUZ? The typical operating current is 4.5 mA at TA = 25°C and AVDD = DVDD = 3 V.
- What is the maximum RF input frequency for the ADF4001BRUZ at 5 V supply? The maximum RF input frequency at 5 V supply is 200 MHz.
- Does the ADF4001BRUZ support power-down modes? Yes, it supports both hardware and software power-down modes.
- What is the phase noise floor of the ADF4001BRUZ? The phase noise floor is –161 dBc/Hz at 200 kHz offset.
- What package type is the ADF4001BRUZ available in? It is available in a 16-Lead Thin Shrink Small Outline Package (TSSOP).
- Is the ADF4001BRUZ compatible with other Analog Devices PLL synthesizers? Yes, it is hardware compatible with ADF4110/ADF4111/ADF4112/ADF4113.
- What are some common applications of the ADF4001BRUZ? Common applications include clock generation, low frequency PLLs, low jitter clock sources, clock smoothing, and frequency translation.
- How does the ADF4001BRUZ contribute to low noise in PLL systems? It features a low noise digital PFD, a precision charge pump, and programmable dividers to ensure low noise and stable reference signals.
- Can the ADF4001BRUZ be used in high-frequency applications? Yes, it can be used in applications up to 200 MHz.
