Overview
The AD9984AKCPZ-170, produced by Analog Devices Inc., is a high-performance 10-bit display interface optimized for capturing YPbPr video and RGB graphics signals. This monolithic analog interface features a 170 MSPS encode rate and a full power analog bandwidth of 300 MHz, supporting all HDTV video modes up to 1080p and graphics resolutions up to UXGA (1600 × 1200 at 60 Hz). The device includes a 170 MHz triple ADC with an internal reference, a PLL, and programmable gain, offset, and clamp control. It operates with a 1.8 V power supply and provides three-state CMOS outputs that can be powered from 1.8 V to 3.3 V.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Resolution | 10 | 10 | 10 | Bits |
| LSB Size | 0.098 | 0.098 | 0.098 | % of full scale (FS) |
| Differential Nonlinearity (25°C) | ±0.6 | ±1.8/−1.0 | ±1.9/−1.0 | LSB |
| Integral Nonlinearity (25°C) | ±2.35 | ±7.0 | ±8.5 | LSB |
| Analog Input Voltage Range | 0.5 | 1.0 | V p-p | |
| Gain Tempco (25°C) | 125 | 125 | 125 | ppm/°C |
| Input Bias Current (25°C) | 1 | 1 | 1 | μA |
| Maximum Conversion Rate | 10 | 170 | MSPS | |
| Maximum PLL Clock Rate | 10 | 170 | MHz | |
| Supply Voltage (VD, VDD, PVD, DAVDD) | 1.7 | 1.8 | 1.9 (VD, PVD, DAVDD), 3.47 (VDD) | V |
| Operating Temperature Range | 0 | 70 | °C |
Key Features
- 10-bit, 170 MSPS triple ADC with internal reference and PLL for generating sample clock from tri-level sync or horizontal sync.
- Programmable gain, offset, and clamp control for each channel.
- Auto-offset and auto channel-to-channel gain-matching features to minimize signal discrepancies.
- Full sync processing for composite sync and sync-on-green applications.
- Three-state CMOS outputs compatible with 1.8 V to 3.3 V power supplies.
- 32-step sampling clock phase adjustment.
- Internal coast generation to maintain PLL output frequency in the absence of a sync input.
- Pb-free, 64-lead lead frame chip scale package (LFCSP) or 80-lead low profile quad flat package (LQFP).
Applications
- Capturing YPbPr video and RGB graphics signals.
- Supports all HDTV video modes up to 1080p.
- Graphics resolutions up to UXGA (1600 × 1200 at 60 Hz).
- Composite sync and sync-on-green applications.
Q & A
- What is the resolution of the AD9984AKCPZ-170?
The AD9984AKCPZ-170 has a 10-bit resolution.
- What is the maximum conversion rate of the AD9984AKCPZ-170?
The maximum conversion rate is 170 MSPS.
- What are the supported video modes and graphics resolutions?
It supports all HDTV video modes up to 1080p and graphics resolutions up to UXGA (1600 × 1200 at 60 Hz).
- What is the operating temperature range of the AD9984AKCPZ-170?
The operating temperature range is from 0°C to 70°C.
- What types of packages are available for the AD9984AKCPZ-170?
The device is available in a 64-lead lead frame chip scale package (LFCSP) or an 80-lead low profile quad flat package (LQFP).
- Does the AD9984AKCPZ-170 have programmable gain and offset control?
Yes, it includes programmable gain, offset, and clamp control for each channel.
- What is the purpose of the auto-offset and auto channel-to-channel gain-matching features?
These features are used to automatically restore signal reference levels and minimize gain mismatches between the three channels.
- Can the AD9984AKCPZ-170 generate a sample clock from sync inputs?
Yes, the on-chip PLL generates a sample clock from the tri-level sync (for YPbPr video) or the horizontal sync (for RGB graphics).
- What is the range of the PLL clock output frequencies?
The PLL clock output frequencies range from 10 MHz to 170 MHz.
- Does the AD9984AKCPZ-170 support composite sync and sync-on-green applications?
Yes, it supports full sync processing for these applications.
