Overview
The AD9680BCPZ-500 is a high-performance, dual 14-bit analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is optimized for wide input bandwidth, high sampling rates, excellent linearity, and low power consumption, making it ideal for various high-speed data acquisition and communication applications. The AD9680 features a multistage, differential pipelined architecture with integrated output error correction logic and supports sampling rates of up to 500 MSPS. It is designed for ease of use, with an on-chip buffer and sample-and-hold circuit, and is packaged in a 64-lead LFCSP (9mm x 9mm) package.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Resolution | 14 bits | |
| Sampling Rate | Up to 500 MSPS | MSPS |
| Analog Input Full Power Bandwidth | 2 GHz | GHz |
| Supply Voltage | 1.25 V, 2.5 V, 3.3 V | V |
| Input Range | 1.46 V p-p to 2.06 V p-p (nominal 1.46 V p-p) | V p-p |
| Programmable Termination Impedance | 400 Ω, 200 Ω, 100 Ω, 50 Ω differential | Ω |
| Channel Isolation/Crosstalk | 95 dB | dB |
| Noise Density at 1 GSPS | −154 dBFS/Hz | dBFS/Hz |
| SNR at 1 GSPS | 65.3 dBFS at 340 MHz (AIN = −1.0 dBFS) | dBFS |
| Package Type | 64-Lead LFCSP (9mm x 9mm) |
Key Features
- Dual 14-bit ADC with multistage, differential pipelined architecture and integrated output error correction logic.
- Supports sampling rates of up to 500 MSPS.
- Internal ADC voltage reference and programmable input ranges.
- Programmable termination impedance (400 Ω, 200 Ω, 100 Ω, 50 Ω differential).
- 2 GHz usable analog input full power bandwidth.
- 95 dB channel isolation/crosstalk.
- Amplitude detect bits for efficient AGC implementation.
- Two integrated wideband digital processors per channel with 12-bit NCO and up to four half-band filters.
- Differential clock input with integer clock divide by 1, 2, 4, or 8.
- Flexible JESD204B lane configurations.
Applications
The AD9680BCPZ-500 is ideally suited for a variety of high-speed data acquisition and communication applications, including:
- Spectrum analyzers.
- Data acquisition systems.
- Military electronics such as radar and jamming/anti-jamming measures.
- Communications receivers requiring automatic gain control (AGC).
Q & A
- What is the resolution of the AD9680BCPZ-500 ADC? The AD9680BCPZ-500 has a resolution of 14 bits.
- What are the supported sampling rates for the AD9680BCPZ-500? The AD9680BCPZ-500 supports sampling rates up to 500 MSPS.
- What is the analog input full power bandwidth of the AD9680BCPZ-500? The analog input full power bandwidth is 2 GHz.
- What are the available supply voltages for the AD9680BCPZ-500? The device operates on 1.25 V, 2.5 V, and 3.3 V dc supply.
- Does the AD9680BCPZ-500 have an internal voltage reference? Yes, it has an internal ADC voltage reference.
- What are the programmable termination impedances available on the AD9680BCPZ-500? The device supports programmable termination impedance of 400 Ω, 200 Ω, 100 Ω, and 50 Ω differential.
- How many integrated wideband digital processors does each channel of the AD9680BCPZ-500 have? Each channel has two integrated wideband digital processors.
- What is the channel isolation/crosstalk of the AD9680BCPZ-500? The channel isolation/crosstalk is 95 dB.
- Does the AD9680BCPZ-500 support JESD204B interface? Yes, it supports flexible JESD204B lane configurations.
- What is the typical SNR of the AD9680BCPZ-500 at 1 GSPS? The typical SNR at 1 GSPS is 65.3 dBFS at 340 MHz (AIN = −1.0 dBFS).
