Overview
The AD9642BCPZRL7-170 is a 14-bit analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is designed to support a wide range of communications applications, emphasizing low cost, small size, wide bandwidth, and versatility. The ADC features a multistage, differential pipelined architecture with integrated output error correction logic, ensuring high performance and accuracy. It operates from a single 1.8 V supply and includes a separate digital output driver supply to accommodate LVDS outputs. The AD9642 is available in a 32-lead Lead Frame Chip Scale Package (LFCSP) and is specified over the industrial temperature range of −40°C to +85°C.
Key Specifications
| Specification | Value |
|---|---|
| Resolution | 14 bits |
| Sampling Rate | Up to 250 MSPS |
| Signal-to-Noise Ratio (SNR) | 71.0 dBFS at 185 MHz AIN and 250 MSPS |
| Spurious-Free Dynamic Range (SFDR) | 83 dBc at 185 MHz AIN and 250 MSPS |
| Input Noise | −152.0 dBFS/Hz at 200 MHz, −1 dBFS AIN, 250 MSPS |
| Total Power Consumption | 390 mW at 250 MSPS |
| Supply Voltage | 1.8 V |
| Output Type | LVDS (ANSI-644 levels) |
| Input Clock Divider | Integer 1-to-8, 625 MHz maximum input |
| Analog Input Range | 1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal) |
| Package Type | 32-Lead LFCSP (5mm x 5mm x 0.75mm) |
| Operating Temperature Range | −40°C to +85°C |
Key Features
- Integrated 14-bit ADC with sampling speeds of up to 250 MSPS.
- Proprietary differential input maintains excellent SNR performance for input frequencies of up to 350 MHz.
- Internal ADC voltage reference and duty cycle stabilizer (DCS) to compensate for variations in the ADC clock duty cycle.
- Flexible analog input range: 1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal).
- LVDS (ANSI-644 levels) outputs and integer 1-to-8 input clock divider.
- 3-pin, 1.8 V SPI port for register programming and readback.
- Flexible power-down options for significant power savings.
- Pin compatibility with the AD9634 and AD6672 for easy migration.
Applications
- Communications systems.
- Diversity radio systems.
- Multimode digital receivers (3G, TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE).
- I/Q demodulation systems.
- Smart antenna systems.
- General-purpose software radios.
- Ultrasound equipment.
- Broadband data applications.
Q & A
- What is the resolution of the AD9642 ADC?
The AD9642 is a 14-bit analog-to-digital converter.
- What are the sampling rates supported by the AD9642?
The AD9642 supports sampling rates of up to 250 MSPS.
- What is the signal-to-noise ratio (SNR) of the AD9642?
The SNR is 71.0 dBFS at 185 MHz AIN and 250 MSPS.
- What is the spurious-free dynamic range (SFDR) of the AD9642?
The SFDR is 83 dBc at 185 MHz AIN and 250 MSPS.
- What is the input noise level of the AD9642?
The input noise is −152.0 dBFS/Hz at 200 MHz, −1 dBFS AIN, 250 MSPS.
- What is the total power consumption of the AD9642 at 250 MSPS?
The total power consumption is 390 mW at 250 MSPS.
- What type of output does the AD9642 use?
The AD9642 uses LVDS (ANSI-644 levels) outputs.
- What is the operating temperature range of the AD9642?
The operating temperature range is −40°C to +85°C.
- What is the package type of the AD9642?
The AD9642 is available in a 32-Lead LFCSP (5mm x 5mm x 0.75mm).
- How is the AD9642 programmed and controlled?
Programming for setup and control is accomplished using a 3-pin, 1.8 V SPI-compatible serial interface.
