Overview
The AD9635BCPZ-125 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is designed for low cost, low power, small size, and ease of use, making it ideal for a variety of applications where high dynamic performance and compact packaging are critical. The AD9635 operates at a conversion rate of up to 125 MSPS and features an on-chip sample-and-hold circuit. It requires a single 1.8 V power supply and supports LVPECL-, CMOS-, and LVDS-compatible sample rate clocks for full performance operation.
Key Specifications
| Parameter | Specification |
|---|---|
| Resolution | 12-bit |
| Sampling Rate | Up to 125 MSPS |
| Supply Voltage | 1.8 V |
| Power Consumption | 115 mW per channel at 125 MSPS |
| Signal-to-Noise Ratio (SNR) | 71 dBFS (to Nyquist) |
| Spurious-Free Dynamic Range (SFDR) | 93 dBc at 70 MHz |
| Differential Nonlinearity (DNL) | −0.1 LSB to +0.2 LSB (typical) |
| Integral Nonlinearity (INL) | ±0.4 LSB (typical) |
| Analog Input Voltage Range | 2 V p-p |
| Analog Bandwidth | 650 MHz full power |
| Package | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) |
| Operating Temperature Range | −40°C to +85°C |
Key Features
- Low power operation: 115 mW per channel at 125 MSPS with scalable power options
- Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.3)
- Full chip and individual channel power-down modes
- Flexible bit orientation
- Built-in and custom digital test pattern generation
- Clock divider and programmable output clock and data alignment
- Programmable output resolution
- Standby mode
- Serial port control
- Data clock output (DCO) and frame clock output (FCO)
Applications
- Communications
- Diversity radio systems
- Multimode digital receivers (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA)
- I/Q demodulation systems
- Smart antenna systems
- Broadband data applications
- Battery-powered instruments
- Handheld scope meters
- Portable medical imaging and ultrasound
- Radar/LIDAR
Q & A
- What is the resolution and sampling rate of the AD9635BCPZ-125?
The AD9635BCPZ-125 is a 12-bit ADC with a sampling rate of up to 125 MSPS.
- What is the power supply requirement for the AD9635BCPZ-125?
The device requires a single 1.8 V power supply.
- What is the power consumption of the AD9635BCPZ-125 at 125 MSPS?
The power consumption is 115 mW per channel at 125 MSPS.
- What is the signal-to-noise ratio (SNR) of the AD9635BCPZ-125?
The SNR is 71 dBFS (to Nyquist).
- What is the spurious-free dynamic range (SFDR) of the AD9635BCPZ-125?
The SFDR is 93 dBc at 70 MHz.
- What are the differential nonlinearity (DNL) and integral nonlinearity (INL) specifications of the AD9635BCPZ-125?
The DNL is −0.1 LSB to +0.2 LSB (typical), and the INL is ±0.4 LSB (typical).
- What is the analog input voltage range of the AD9635BCPZ-125?
The analog input voltage range is 2 V p-p.
- What is the analog bandwidth of the AD9635BCPZ-125?
The analog bandwidth is 650 MHz full power.
- What are the power-down modes available for the AD9635BCPZ-125?
The device supports full chip and individual channel power-down modes.
- What are some of the key applications of the AD9635BCPZ-125?
Key applications include communications, diversity radio systems, multimode digital receivers, I/Q demodulation systems, smart antenna systems, and more.
- What is the operating temperature range of the AD9635BCPZ-125?
The operating temperature range is −40°C to +85°C.
