Overview
The AD9600ABCPZ-150 is a dual, 10-bit analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is designed to support communications applications where low cost, small size, and versatility are crucial. The AD9600 features a multistage, differential pipelined architecture with integrated output error correction logic, ensuring high performance and reliability. Each ADC includes wide bandwidth, differential sample-and-hold analog input amplifiers and an integrated voltage reference, simplifying design considerations. The device operates from a single 1.8 V supply and supports various output logic families from 1.8 V to 3.3 V CMOS or 1.8 V LVDS.
Key Specifications
Parameter | Min | Typ | Max | Unit |
---|---|---|---|---|
Resolution | 10 | 10 | 10 | Bits |
Offset Error | ±0.3 | ±0.7 | ±0.7 | % FSR |
Gain Error | -4.3 | -3.0 | -1.6 | % FSR |
Differential Nonlinearity (DNL) | ±0.2 | ±0.2 | ±0.2 | LSB |
Signal-to-Noise Ratio (SNR) | 60.6 | 60.6 | 60.6 | dB |
Spurious-Free Dynamic Range (SFDR) | 81 | 81 | 81 | dBc |
Sample Rate | 150 | 150 | 150 | MSPS |
Analog Supply Voltage | 1.8 | 1.8 | 1.8 | V |
Digital Output Supply Voltage | 1.8 | 3.3 | 3.3 | V |
Power Consumption | 825 | mW |
Key Features
- Integrated dual, 10-bit, 150 MSPS ADC with multistage, differential pipelined architecture and integrated output error correction logic.
- Fast overrange detect and signal monitor with serial output, aiding in automated gain control (AGC) functions.
- Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz.
- Low power consumption of 825 mW at 150 MSPS.
- Supports 1.8 V to 3.3 V CMOS or 1.8 V LVDS output logic families.
- Flexible power-down options for significant power savings.
- Pin compatible with AD9627-11, AD9627, and AD9640, allowing easy migration to different bit resolutions.
- Integer 1 to 8 input clock divider and duty cycle stabilizer to compensate for ADC clock duty cycle variations.
Applications
The AD9600ABCPZ-150 is primarily designed for communications applications, including but not limited to:
- Wireless infrastructure (base stations, repeaters)
- Wireless handsets and terminals
- Cable and satellite communications
- Radar and electronic warfare systems
- Medical imaging and diagnostic equipment
Q & A
- What is the resolution of the AD9600ABCPZ-150 ADC?
The AD9600ABCPZ-150 has a resolution of 10 bits.
- What are the sample rates supported by the AD9600ABCPZ-150?
The device supports sample rates of 105 MSPS, 125 MSPS, and 150 MSPS.
- What is the signal-to-noise ratio (SNR) of the AD9600ABCPZ-150?
The SNR is 60.6 dBc to 70 MHz at 150 MSPS.
- What is the power consumption of the AD9600ABCPZ-150 at 150 MSPS?
The power consumption is 825 mW at 150 MSPS.
- What are the supported output logic families for the AD9600ABCPZ-150?
The device supports 1.8 V to 3.3 V CMOS or 1.8 V LVDS output logic families.
- Does the AD9600ABCPZ-150 support fast overrange detection?
Yes, it features fast overrange detect and signal monitor with serial output.
- Is the AD9600ABCPZ-150 pin compatible with other ADC models?
Yes, it is pin compatible with AD9627-11, AD9627, and AD9640.
- What is the purpose of the duty cycle stabilizer in the AD9600ABCPZ-150?
The duty cycle stabilizer compensates for variations in the ADC clock duty cycle, ensuring excellent performance.
- What are the key applications of the AD9600ABCPZ-150?
The key applications include wireless infrastructure, wireless handsets, cable and satellite communications, radar, and medical imaging.
- How does the AD9600ABCPZ-150 aid in automated gain control (AGC) functions?
The device aids in AGC through fast overrange detection, signal monitoring, and programmable threshold detection.